DSPI Issues related to the DMA Usage ?

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DSPI Issues related to the DMA Usage ?

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gpontis
Contributor IV

The MQX 4.1 Release Notes, section 5.25, page 26 is "DSPI Issues related to the DMA Usage". In here it is stated that DSPI may not work properly if there is some other user of eDMA besides it. This is attributed to a silicon issue.

I don't see anything related to this in the chip errata for the K60. However, my application uses seven channels of DMA. Of those several interact with SPI1 and others touch ADC0 and the flexbus. I am using my own drivers and DMA code for all this, not those in MQX.

So far, and with limited testing, it seems to work. But this concerns me. Is there is specific case that is problematic. Is there any further documentation on this problem?

George

3 Replies

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gpontis
Contributor IV

Thank you Soledad for adding some information on this subject, but I am struggling to understand the significance. As far as only one DMA channel being active at a time, I do understand that. There is usually arbitration to access memory anyway. So writing the SPI RX data and fetching the next word to transmit, for example, could not happen exactly at the same time. If this is the second issue that you describe, then no problem so long as they both succeed eventually. ( Eventually being a few bus cycles later. )

The first issue about not being able to do transfers simultaneously, this one we could use some further explanation. Is it a limitation in that the DMA may not work at all for the ADC or SPI when both are enabled ? If so, then this would seem to be something documented in the errata. Or is it just a condition that affects performance ? Can you give us some specific details of the problem and how to avoid it ?

George

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soledad
NXP Employee
NXP Employee

Hi,

There exists a silicon issue if using "Always enabled" DMA source.

While, SPI and ADC module is using eDMA, there with restriction that both modules could not do DMA transfer simultaneously.

In addition the eDMA module is only active one DMA channel at one time, although SPI transmit and receive could hardware trigger DMA transfer.

Have a great day,
Regards
Sol
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tsvetanmudrov
Contributor III

Sorry, but I cannot understand anything from this explanation.

Can you address me to datasheet (reference manual) where the problem is explained more in details?

Thanks

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