the same program can not be executed by multi cores

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the same program can not be executed by multi cores

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mcl052016
Contributor I

BackGround:

In MPC5748G, I program one piece of code via z4a core in one single elf file.

Then I enable z4b in this single core project(z4a.elf), by configuring the BAF, CCTL2/CADDR2

By the way, z4b start address is the same as z4a, but with different stack.

However z4b does not run.

What is wrong?

But when I create another specific project for z4b, then flash z4a.elf + z4b.elf, they both works fine.

When I create projects in Tricore/rh850, the 2 cores run the same program(the same binary on the same address of flash) with different ram(stack, the small data-addressing base address is the same, of course), they work fine. when they immigrates to PowerPC, they fail. 

What is the constraints that is hidden from programmer?

Thanks

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mcl052016
Contributor I

Hi Martin,

      Thank you for your answer.

      The S32 Design Studio is used. But I just create one project with single core.

      I have edited the startup.s file. In the file, the core_id register is used to differentiate z4a core and z4b core.

      When z4b core executes, it will skip the RAM initialization, data copy from loaded rom to ram .....

      It only load it r2/r13 with the same value as that in z4a core. While the stack is different from z4a's.

      In the main function, it will skip initialize interrupt controller and all other things which are already initialized by z4a.

      So, z4b should have worked.  Logically speaking, there is no problem.

      Via this way, the compiler is cheated and one can maintain one source file project, not separately into 2.

      In Hightec Compiler, it works fine. One may argue that 2 different CC will may generate different elf files.

      However, the s-record file is used instead of elf file. So In Hightec Compiler( GUN CC same to S32 DS),

      elf and s19 file both works.

      In S32 DS, elf and s19 neither work.     

   

BR

Charlin           

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martin_kovar
NXP Employee
NXP Employee

Hello Charlin,

from your description it makes sense to me and from my point of view, this should work. Could you please share your project or at least elf file?

I would like to check this on my side and do some further investigation.

Regards,

Martin

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martin_kovar
NXP Employee
NXP Employee

Hello,

not sure, what is the IDE you use and what is the project you use, but I will try to describe for S32 Design Studio default project.

Every S32DS multicore project is folded from more projects. Every project has own startup file, linker file, file with interrupt vector table etc.

Also, every project works with its own part of memory (RAM and Flash). So, if you load multicore project into the microcontroller, programs for both core are mostly independent.

But if you enable code z4b and this works with the same part of flash memory as core z4a, this could causes some problems, because z4b initializes some part of microcontroller again (like RAM, Interrupt controller etc)

Could you please describe in detail, how is your program structured and eventually share some project I can test on my side?

Also could you please clarify the use case, why you want to run both cores on the same part of memory?

Regards,

Martin

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