mulicores operating performance

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mulicores operating performance

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bwp530
Contributor IV

MPC5777M S32DS-2017R1

I have a multicores code. 

The core Z4_0 is boot core and it includes some tasks. When I only debug Z4_0, it executes the tasks about 9600 times per second.

But when I debug multicore code(Z4_0, Z7_0, Z7_1), Z7_0 and Z7_1 have their own tasks, the Z4_0 executes the tasks about 6000 times per second, which means Z7_0 and Z7_1 tasks have influence on Z4_0.

so I try to find this cause and test it. The more variables Z7_0 and Z7_1 use in the process of operation, the slower Z4_0 runs.

So I think operating efficiency become bad when multi cores access SRAM at the same time,  Maybe it is about XBAR limit。

Am I right? how can I fix this problem?

b55689

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petervlna
NXP TechSupport
NXP TechSupport

Hi,

In case you are constantly accessing with all cores to one slave on XBAR, you will see a delay since only one master can access one slave at a time.

but if you time you application you will get performance increase for sure.

If you want z4 to have highest access priority, you can program XBAR for it.

I wander what is your target application. As this device is powertrain and it is intended for comb motor control.

regards,

Peter

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bwp530
Contributor IV

Hi Peter:

I check PRS4 of XBAR_0, the Z4 is highest priority in the default value.

My project is not used for comb motor control, whose funtion is mainly about vehicle gateway(can bus\uart\ethernet...) and include some motion control algrithom.

Every core has its own project and run separately, so I don't know how to time my appllication, could you tell me how?

And I want to know if I can use D-MEM of MPC5777M for this issue?

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

Every core has its own project and run separately, so I don't know how to time my application, could you tell me how?

Well, this is application dependent. And since we do not have any knowledge on your application, you should do first feasibility study to see the best possible timings and take care of all possible application corner cases. But I guess you did this before you even pick up micro for your project.

And I want to know if I can use D-MEM of MPC5777M for this issue?

Yes, you can use it to increase performance of desired core.

First of all check you feasibility study to see which tasks on which cores are time critical, and set device accordingly to enabled privileged access to its resources. (since there is only 1 XBAR)

regards,

Peter

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