linFlex master can't work on DEVKIT_MPC5748G

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linFlex master can't work on DEVKIT_MPC5748G

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bwp530
Contributor IV

MPC5xxxI am debuging lin master on DEVKIT_MPC5748G.

but the lin TX port PB2 has no reaction and the code is blocked by:

 

  while (!LINFlexD_0.LINSR.B.DTF); 	/* Wait for data transfer complete flag */

 

 

I have found several topics in forum, but It still can't work.

 

 

void linflex_init(void)
{
    /* Configure pad PB2: LIN0TX */
    SIUL2.MSCR[PB2].B.SSS = 1;    /* Pad PB2: Source signal is LIN0_TXD  */
    SIUL2.MSCR[PB2].B.OBE = 1;    /* Pad PB2: Output Buffer Enable */
    SIUL2.MSCR[PB2].B.ODE = 1;    /* Pad PB2: Output Drain Enable */
    SIUL2.MSCR[PB2].B.PUS = 1;    /* Pad PB2: Pull up selected */
    SIUL2.MSCR[PB2].B.PUE = 1;    /* Pad PB2: Pull Enable */
    SIUL2.MSCR[PB2].B.src=3;    /* Pad PB2: Maximum slew rate */

    /* Configure pad PB3 for LIN0RX */
    SIUL2.MSCR[PB3].B.IBE = 1;    /* Pad PB3: Enable pad for input - LIN0_RXD */
    SIUL2.IMCR[712-512].B.SSS = 2;   /* LIN0_RXD: connected to pad PB3 */

   /*LIN0 initialization*/

    /* enter INIT mode */

    LINFlexD_0.LINCR1.R = 0x0081; /* SLEEP=0, INIT=1 */

    /* wait for the INIT mode */
    while (0x1000 != (LINFlexD_0.LINSR.R & 0xF000)) {}

    /* configure baudrate 19200 , LIN0  is clocked from F40 so reference clock is 40MHz*/

//    VU32 _baudRate;
//    VU32 _fraction;
//    VU32 _integer;

/*

    _baudRate  = (40 * 1000000) / 19200; //MHz * 1000000 /baudRate
    _integer   = _baudRate / 16;  => 130

    _fraction  = _baudRate - (_integer * 16); =>3

*/


    /* assuming 64 MHz peripheral set 1 clock */
     LINFlexD_0.LINIBRR.B.IBR= 260; /* Mantissa baud rate divider component */
     LINFlexD_0.LINFBRR.B.FBR = 3; /* Fraction baud rate divider comonent */

    LINFlexD_0.LINCR2.R = 0x4000; /* IOBE=1, Bit error resets LIN state machine */
    LINFlexD_0.LINTCSR.R = 0; /* LIN timeout mode, no idle on timeout */

//    LINFlexD_0.BIDR.B.CCS = 0; /* enhanced checksum for LIN Slave */

    /* enter NORMAL mode */
    /* CCD bit 16 = 0 ... checksum calculation by hardware
       CFD bit 17 = 0 ... checksum field is sent after the required number
       of data bytes is sent
       LASE bit 18 = 1 ... Slave automatic resync enable
       AWUM bit 19 = 0 ... The sleep mode is exited on software request
       MBL bits 20:23 = 0b0011 ... 13-bit LIN Master break length
       BF bit 24 = 1 ... bypass filter
       SFTM bit 25 = 0 ... Self Test mode disable
       LBKM bit 26 = 0 ... Loop Back mode disable
       MME bit 27 = 0 ... Slave mode
       SBDT bit 28 = 0 ... 11-bit Slave Mode break threshold
       RBLM bit 29 = 0 ... Receive Buffer not locked on overrun
       SLEEP bit 30 = 0
       INIT bit 31 = 0 ... entering Normal mode
       =
       0x2380

       */

    LINFlexD_0.LINCR1.R = 0x0590;


}
void transmitLINframe (void) {   	/* Transmit one frame 'hello    ' to ID 0x35*/
  LINFlexD_0.BDRM.R = 0x2020206F; 	/* Load most significant bytes '   o' */
  LINFlexD_0.BDRL.R = 0x6C6C6548; 	/* Load least significant bytes 'lleh' */
  LINFlexD_0.BIDR.R = 0x00001E35; 	/* Init header: ID=0x35, 8 B, Tx, enh cksum*/
  LINFlexD_0.LINCR2.B.HTRQ = 1;   	/* Request header transmission */

  while (!LINFlexD_0.LINSR.B.DTF); 	/* Wait for data transfer complete flag */
  LINFlexD_0.LINSR.R = 0x00000002;  /* Clear DTF flag */
}

 

 

when I test in tast mode, the lin master can work.

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bwp530
Contributor IV

because there is only one lin port on devkit, so I just test the signal on the TX port and have no any connection on it. but I enalbe the bit error, when TX start transport, the bit error happened which make sigal is not right. If I disable the bit error, the signal is right.

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bwp530
Contributor IV

because there is only one lin port on devkit, so I just test the signal on the TX port and have no any connection on it. but I enalbe the bit error, when TX start transport, the bit error happened which make sigal is not right. If I disable the bit error, the signal is right.

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