keep SRAM data

[oceansea]

hi,

i use S32DS for Power v2.1  create a MPC5748G  core0 project,and change the linker file,because i need a custom SRAM area,so i add a new section.

but ,if write or read data in this SRAM area ,the core0 will stop.

then i compare the linker file :

this is unmodified:

modify:

And the startup_MPC5748G.S will Initialise SRAM ECC

so, after change,this SRAM area is not initialized causing a read/write crash.

but,i hope that the data in custom SRAM will not be cleared,when the core0 is soft reset.

here is how i soft reset core0:

MC_ME->MCTL= 0x00005AF0;

MC_ME->MCTL = 0x0000A50F;

so my question is:

If the custom SRAM(my new section) have no Initialise,the core0 will err when read/write ;

but i need keep the data when core0 soft reset.

oceansea 

best wish.

[petervlna]

Hello,

Well, it depends on if the RAM content is destroyed by your BIST tests.

If yes, then you need to disable BIST or exclude some RAM part from it.

Reading what you wrote, looks like you are running BIST on SW reset, or your reset destroys RAM content at all.

On the Short functional reset, the RAM content is preserved, and on the long functional reset also but only if memory BIST is not active.

Best regards,

Peter

[oceansea]

hi，

thank you reply

and，can you show me some example code？

best wish

oceansea

[petervlna]

Hello,

Not for this case. But you simply do branching on startup in case of SW reset, to either:

1. skip RAM init at all

2. or to exclude RAM init of the certain part which you want to preserve.

Best regards,

Peter