eDMA transmit completion and sequence on MPC5777C

[berat24]

Hello everyone,

I am sending 12.800 byte from source to destination with eDMA 32 channel. I am initializing channels in turn from 0 to 31 without waiting channels to complete transmission. Each channel carry 400 byte.

I would like to learn what is the completion sequence among the channels. I supposed that first channel which I initialize would complete its transmission firstly. Also I supposed that the last channel which I initialize would complete its transmission lastly.

I would like to learn whether there is a relationship between starting sequence and finishing time.

I attached a part of my code about that.

volatile uint32_t i,j;
uint32_t sourceData[3200];
uint32_t destData[3200];

static void eDMA_Init(DMA_Type* dma, uint32_t channel, uint32_t *sourceAddr, uint32_t *destAddr, uint32_t ByteCount)
{

// SOURCE ADRESS
dma->TCD[channel].SADDR = (uint32_t)sourceAddr;
// SMOD AND DMOD ARE 0
// SSIZE AND DSIZE ARE 8 BIT (0X0)
dma->TCD[channel].ATTR = 0x0000;
// SOFF IS 1 BYTE. AFTER COMPLETİNG A TRANSFER, THIS IS ADDED TO SDADDR.
dma->TCD[channel].SOFF = 1;
// NBYTE IS 400
dma->TCD[channel].NBYTES.MLNO = ByteCount;
// SLAST IS -400. THIS VALUE IS USED TO RETURN SADDR TO FIRST ADRESS VALUE
dma->TCD[channel].SLAST = -ByteCount;
// DESTINATION ADRESS
dma->TCD[channel].DADDR = (uint32_t) destAddr;
dma->TCD[channel].DLASTSGA = -ByteCount;
// THE NUMBER OF MAJOR LOOP
dma->TCD[channel].CITER.ELINKNO = 1;
// DOFF IS 1 BYTE. AFTER COMPLETİNG A TRANSFER, THIS IS ADDED TO DADDR.
dma->TCD[channel].DOFF = 1;
// BITER IS EQUAL TO CITER. AFTER CITER REACHES O, CITER WILL BE EQUAL BITER AGAIN.
dma->TCD[channel].BITER.ELINKNO = 1;
dma->TCD[channel].CSR = 0;
DMA_0->TCD[channel].CSR |= (0x1<<1);
dma->CR = 0xC;
dma->TCD[channel].CSR |= 0x1;
// SECOND WAY TO START DMA
//DMA_0->SSRT = 0;

}

uint32_t channel = 0;
uint32_t *p = sourceData;
uint32_t *q = destData;
for(channel = 0; channel<32; channel++)
{

eDMA_Init(DMA_0, channel, p, q, 400);
p += 100;
q += 100;

}

[lukaszadrapa · Accepted solution]

Hi,

I can see that you configured CR register as 0xC. That means ERGA and ERCA bits are set, so Round Robbin Arbitration is configured for channel and group.

You can take a look at section "16.6.3 Arbitration mode considerations" in the reference manual and especially at "16.6.3.3 Round-robin group arbitration, round-robin channel arbitration" to understand how it works.

If you want to be sure that the channels are triggered one by one regardless of these priorities and arbitration, you can use linking. So, when one channel is finished, it starts another one, so you can create a chain starting at channel 0 and finishing at channel 31.

Regards,

Lukas

[berat24]

Hello,

Firstly, thank you for your response.

I waited done bit to initiliaze other channels on each transfer. Also, I used channel linking mode after my question as you said  Both of them worked separately and I saw interrupts.