Verify MPC5775B/E-EVB Processing/Timing constraints

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Verify MPC5775B/E-EVB Processing/Timing constraints

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bchang32
Contributor III

I am researching using this MCU and the specific eval board to control some items.

 

I need to have sub millisecond resolution. I am hoping to connect 64 inputs to the ADC. From looking at the ADC, it can go up to 33 MHz. A conversion cycle takes ~143 cycles, so does that mean to look at all 64 ADC channels, it'll take ~4.29us (33MHz ~30ns. 30ns*132 ~ 4.29us). I don't think I found anything about the mux switching delay?

 

Does this seem like it should be fine or am I missing something to consider?

 

Thanks!

 

 

 

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petervlna
NXP Employee
NXP Employee

Hello,

Yes 32 is the channels in one ADC.

And you can convert 2 channels at once. as there are 2 adc modules in one EQADC.

Reading results can be done simultaneously via DMA, So you will read 2 ADCs on conversion complete at once. Much faster then when you use core. But even reading via core will add very small time, but will deplete computing power significantly as you need it to be cyclical reads.

So best way is to use DMA, and free core from any intervention.

So if I wanted to constantly read from all 64 channels, it would be ~275.56 us?

No. that would be time for 128 channels conversion.

Best regards,

Peter

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bchang32
Contributor III

Thanks Peter! That clarifies a lot!

Just to make sure I'm understanding,

So if I am using the MPC5775E, which has 2 ADCs, it can support up to 128 ADC channels. (although I plan on using the this dev board Link which only has 64 ADC inputs).

 

since each ADC has 2 ADCs, I can essentially read from 64 ADCs in 1/33MHz * 143 * 32 (32 since each ADC supports 32 channels) = ~139 us.

 

My final concern is the eTPU and eMIOS. This are independent IOs right? So I can independently choose which to go high and which to go low? From looking at the schematic, can you clarify what TP51-52 and TP55-58 correspond to? Why does only eTUPB and eMIOS have the full 32 pin i/o?

bchang32_0-1638884153873.png

 

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petervlna
NXP Employee
NXP Employee

Hello,

eTPU and eMIOS. This are independent IOs right?

eMIOS is periphery (IP) and eTPU is processing core (its ASIC)

So I can independently choose which to go high and which to go low?

Not sure about this, but if you are talking about signal levels, then yes.

Why does only eTUPB and eMIOS have the full 32 pin i/o?

If you are asking about board implementation, then it is because the design decided that way.

can you clarify what TP51-52 and TP55-58 correspond to?

TP = test point. Not sure what document you are referring to.

Check out MPC5775BE EVB User Guide for details.

Best regards,

Peter

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bchang32
Contributor III

eMIOS is periphery (IP) and eTPU is processing core (its ASIC)

Not sure about this, but if you are talking about signal levels, then yes.

So functionally, they're essentially the same with the application being I/O (except one is NXP proprietary while the other is just fast I/O since it has its own processor per eTPU site)? My application is that I just need to be high or low based upon user decisions.

TP = test point. Not sure what document you are referring to.

Check out MPC5775BE EVB User Guide for details.

The document I am referring to is the eval board schematic (the image that I previously attached). I was hoping to check the user guide, but it appears there isn't one for this specific board and only the other board you mentioned. Board I was hoping to find the user guide. There's a quick start guide but that appears mostly software programming and a quick overview of the boards functionality.

 

Thanks!

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petervlna
NXP Employee
NXP Employee

Hello,

So functionally, they're essentially the same with the application being I/O (except one is NXP proprietary while the other is just fast I/O since it has its own processor per eTPU site)? My application is that I just need to be high or low based upon user decisions.

Well, if you look at it as black box outputting signal level high or low. then yes.

The document I am referring to is the eval board schematic (the image that I previously attached). I was hoping to check the user guide, but it appears there isn't one for this specific board and only the other board you mentioned. Board I was hoping to find the user guide. There's a quick start guide but that appears mostly software programming and a quick overview of the boards functionality.

Have a look at following link:, there is user guide.

https://www.nxp.com/design/development-boards/automotive-development-platforms/mpc57xx-mcu-platforms...

Best regards,

Peter

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petervlna
NXP Employee
NXP Employee

Hello,

Your calculation seem to me not precise:

petervlna_0-1638781966637.png

If I take max from datasheet:

(1/33Mhz ) * 143 * 32 = 138,6us

As you want to convert 64 channels and have 2 ADC units.

I don't think I found anything about the mux switching delay?

There is no delay defined. So I guess i fragment of a clock.

Best regards,

Peter

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bchang32
Contributor III

Is the 32 from the 32 channels in each ADC?

So if I wanted to constantly read from all 64 channels, it would be ~275.56 us?

 

Could you clarify what you mean a fragment of a clock? Like give or take a couple clock cycles (so a handful of ns per read)?

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