TRK5606-B : Bootloading through CAN while SBC in Normal Mode

[raghavendrapura]

Hello,

Bootloading through CAN while SBC in Normal Mode, the microcontroller is always in reset. But during in debug mode of SBC we are successful in flashing but in Normal Mode.

I guess the SBC watchdog is not getting serviced during Normal Mode while flashing. But we don't know the required procedure.

Please let me know a detailed procedure for Bootloading through CAN while SBC in Normal Mode. I am looking for step by step procedure or guidelines.

SBC Information :

SBC Gen2 with CAN High Speed

and LIN Interface

33903/4/5

Regards,

Raghavendra P

[ajazsaleemtaj]

Hello Lukas,

I have verified SBC same command sequence, but iam not getting responses as specified. Could you please share code snippet used by you for Initializing SBC and setting FLASH mode

[lukaszadrapa]

Here you go:

uint16_t RecDataMaster = 0;         /* Data recieved on master SPI */

void ReadDataDSPI_1(void) {

  while (DSPI_1.SR.B.RFDF != 1){}  /* Wait for Receive FIFO Drain Flag = 1 */

  RecDataMaster = DSPI_1.POPR.R;    /* Read data received by slave SPI */

  DSPI_1.SR.R = 0x80020000;       /* Clear TCF, RDRF flags by writing 1 to them */

}

And in main:

     DSPI_1.PUSHR.R = 0x00011D00;

      ReadDataDSPI_1();

      printf("0x1D00, 0x%X, device mode\r\n",RecDataMaster); //send to terminal for test purposes

      DSPI_1.PUSHR.R = 0x00015A00; // write normal mode

      ReadDataDSPI_1();

      printf("0x5A00, 0x%X, write normal mode\r\n",RecDataMaster);

      DSPI_1.PUSHR.R = 0x00011D00;

      ReadDataDSPI_1();

      printf("0x1D00, 0x%X, device mode\r\n",RecDataMaster);

      DSPI_1.PUSHR.R = 0x00011300;

      ReadDataDSPI_1();

      printf("0x1300, 0x%X, read device mode\r\n",RecDataMaster);

      RecDataMaster = ~RecDataMaster;

      RecDataMaster = RecDataMaster & 0x003F;    

       DSPI_1.PUSHR.R = 0x00015280 | RecDataMaster;

      ReadDataDSPI_1();

      printf("0x5280, 0x%X, flash mode\r\n",RecDataMaster);

      DSPI_1.PUSHR.R = 0x00011D00;

      ReadDataDSPI_1();

      printf("0x1D00, 0x%X, device mode\r\n",RecDataMaster);

[christianhdz]

In other examples for reading using SPI usually I see code to send a dummy byte  after the READ request. Is this also needed for the SBC 33903? or the data is automatically placed on the clock cycles of the READ request?

[ajazsaleemtaj]

Hello Lukas,

We have tried with sequence of commands specified by you and verified with 0x1300 but still INIT mode is only provided as a response and we are unable to enter FLASH mode. u32_SBCResp[0] shows 0x1300 response, u32_SBCResp[1] shows ( 0x5280 | InvertedBits), u32_SBCResp[2] shows 0x1300 response after setting FLASH mode. But still it responded with 01 only which means it is in INIT mode. We also set Watchdog timer to 32secs after this command sequence. Please check and revert if any other sequences can be verified with.

- Ajaz Saleem Taj

[lukaszadrapa]

Hi,

I found some time to play with the SBC chip. I tried this minimalist setup:

1. Send 0x1D00 (read device current mode). It returns 0x21FF.

2. Send 0x5A00 (enter normal mode)

3. Send 0x1D00 (read device current mode). It returns 0x2119 which means we entered normal mode.

4. Send 0x1300 as described in previous post. Random code is received.

5. Send (0x5280 OR inverted random code) to enter flash mode.

6. Send 0x1D00 (read device current mode). It returns 0x210B which means we entered flash mode.

Here are details about how to read current mode:

Lukas

[ajazsaleemtaj]

Hello Lukas,

Thanks for your support and in-detail description.

We have verified with Microcontroller, its time is more than Normal mode Watchdog refresh delay of 512msec.

I would like to explain the scenario in which reset is occuring,

We have requirement to either Flash Application code or Calibration data in High sectors of Flash memory. We are downloading required code/data from CANape thru CCP. So when ERASE library function is invoked, it will check MCR register in WHILE loop and since its Erase time is more than 1SEC(depending upon number of erase) we are unable to Refresh watchdog during this time and Reset is in-forced by SBC and CAN communication is aborted. Moreover, during erase we disable All Interrupts so it is not possible to Refresh Watchdog thru SPI in this scenario.

We have actually configured SBC in FLASH mode with 32secs watchdog refresh delay (as per specified sequence provided by you in excel sheet in earlier comments). but as above scenario suggest Flash mode has not been set in SBC.

So, i request to suggest some other process to verify FLASH mode entrance or could you please elaborate more on DEBUG mode thru SPI command( as specified in user manual, in debug mode watchdog refresh is not required we can use this mode during ERASE). Moreover, In user manual process to set Debug mode is not specified anywhere, could you please suggest on it.

Regards,

Ajaz Saleem Taj

[lukaszadrapa]

Hi,

this is the comment that I got from colleagues who are more experienced with this SBC chip:

• How enter in flash mode:
  • By Secured SPI command
    • Read random code
      • MOSI: 0x0001 0011 0000 0000 (0x1300)
      • MISO: xxxx xxxx xxR5R4 R3R2R1R0 (RX=6 bits random)
    • Write Flash mode + random code inverted
      • MOSI: 0101 0010 10Ri5Ri4 Ri3Ri2Ri1Ri0 ( 0x52HH with HH Ri5toRi0)
• How to confirm flash mode :
  • Read Specific Mode Register
    • MOSI: 0x1300
    • MISO: xxxx xxxx 10xx xxxx (Means Flash mode)
• How to extend WD timeout:
  • Write in Timer Register C (once in flash mode)
    • MOSI: 0x58Fx

Note: I supposed parity is not selected.

Debug mode can be selected only externally by debug pin. It is not possible to enter debug mode by SW.

Lukas

[liujian]

Hi

Sorry this question is not for my reply.

migliu

[lukaszadrapa]

Hi,

either refresh the watchdog periodically (simply use command 0x5A00):

or enter Flash mode:

You can find command sequences in attached excel sheet.

Regards,

Lukas

[raghavendrapura]

Hello Lukas,

Many thanks for the information.

Is it possible to disable the watchdog of SBC during flashing on CAN?

We don't want to service the internal watchdog of SBC during bootloading on CAN.

can we flash in Normal mode?

Regards,

Raghavendra P

[lukaszadrapa]

Hi,

the watchdog cannot be disabled in normal mode. You must either refresh the watchdog or you can use Flash mode to extend the timeout to 32s.

Regards,

Lukas

[raghavendrapura]

Hello Lukas,

Please reply.

Regards,

Raghavendra P

[lukaszadrapa]

Hi,

flash mode can be entered from normal mode in this way (copied from XLS file):

Then you can find that default timeout for flash mode is only 48ms:

So, it is necessary to re-initialize the timeout to its maximum:

That means you can use command 0x58 0xF0 to extend the timeout.

Lukas

[raghavendrapura]

Hello Lukas,

Many thanks for the information.

I shall try it out in the morning.

But what we observed is CAN error frames during flashing in Normal Mode. We are using CCP protocol for bootloading over CAN.

We did not face any problem in debug mode but when we switch to normal mode we are not able to flash because of CAN error.

Do you know a detail sequence or proper steps to be followed for flashing in normal mode along with control word? Kindly let me know

Regards,

Raghavendra P

[lukaszadrapa]

Hi,

did you find the root cause of CAN error? Is the device reset by SBC watchdog? The only problem I can see is that it is necessary to refresh the watchdog periodically in normal mode.

Lukas

[raghavendrapura]

Hello Lukas,

No still we are facing the CAN issue during flashing.

Could you please provide your contact number so that we can call you to discuss this issue in detail because sometimes writing every information in email is cumbersome.

Can we do webex meeting ? Or any preferred communication....

I have requested my colleague who is working on this topic to write you a detail information on the issue.

Regards,

Raghavendra P

[lukaszadrapa]

Hi,

I have only very basic knowledge of this SBC chip, so I'm not able to answer your questions about SBC immediately.

You wrote that the device is reset by SBC even if the watchdog is refreshed. How do you refresh the watchdog? Is the watchdog refreshed also during erase operation? As you can see in datasheet, erase operation can take a lot of time:

Do you use SSD flash drivers? Do you have your own drivers? It is necessary to find a way how to refresh the watchdog - if you use SSD drivers, it allows you to use callback function. If you have own drivers, update it, so the watchdog is refreshed in loop where you wait for end of operation.

Lukas

[raghavendrapura]

Hello Lukas,

My colleague has provided some more information below. Kindly check and provide feedback.

Regards,

Raghavendra P

[raghavendrapura]

Hello Lukas,

How do we know if the device is in Flash Mode?

We used the command as mentioned in the excel sheet and it still not successful in flashing.

Regards,

Raghavendra P

[raghavendrapura]

Hello Lukas,

We are facing issues during flashing though CAN in SBC Normal Mode.

We also tried to flash in SBC Flash Mode then also we could see SBC resetting 5606B eventhough watchdog is serviced.

It works perfectly fine in SBC Debug Mode but flashing in Normal and Flash mode is giving CAN error and also safe LED is on/blinking.

Could you please tell us the procedure or sequence to do flashing in Normal/Flash mode.

Regards,

Raghavendra P