TLB initialisation

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

TLB initialisation

1,324件の閲覧回数
stefintomy
Contributor I

I want to access whole RAM , ROM ,Bridge A and B from Z6 core in MPC5668G. Could you please help me to configure TLBs for the same.

I will be grateful to you if you can share those details .

ラベル(1)
0 件の賞賛
返信
1 返信

1,119件の閲覧回数
petervlna
NXP TechSupport
NXP TechSupport

Hi,

Here is my example for TLB table configuration: (flash memory)

;--------- SET UP MMU (BEGIN)--------------------------------------------

                    ;table 0

    e_lis r5, 0x10000000@ha

    e_add16i r5, r5, 0x10000000@l

        mtspr mas0,r5                ; mtspr MAS0,r5

    e_lis r5, 0xC0000600@ha

    e_add16i r5, r5, 0xC0000600@l   

         mtspr mas1,r5                ; mtspr MAS1,r5

    e_lis r5, 0x00000020@ha

    e_add16i r5, r5, 0x00000020@l   

    mtspr mas2,r5                ; mtspr MAS2,r5

    e_lis r5, 0x0000003F@ha

    e_add16i r5, r5, 0x0000003F@l   

    mtspr mas3,r5                ; mtspr MAS3,r5

    tlbwe                        ; Write the entry to the TLB

And here is the link for TLB configurator:

MMU Assist Register CONFIGURATOR

Continue the way i show to you and add RAM, or anything required according to reference manual.

Peter

0 件の賞賛
返信