Switching from z4 core to z2 core in MPC5748G

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Switching from z4 core to z2 core in MPC5748G

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FAISAL0323
Contributor II

Dear NXP Expert,

I am using MPC5748G, and I have bootloader and application code both are written and run by z4 core. But now I need to move bootloader from z4 core to z2 core. I have following questions. 

1. Do I need to write code again by making new project for z4 or is there any way to switch from z4 core to z2 core without making new project. 

2. After switching, how I can make it sure and see switching has been successful from z4 core to z2 core. 

3. During Run time z4 core will be executed first as it is main core, how we can wakeup and jump to z2 core where we have our bootloader which we just moved from z4 core to z2 core?

Best Regards

Muhammad Faisal Khan

 

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lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi @FAISAL0323 

The best way is to create new multicore project (S32DS will create independent projects for each core) and then copy your code to Z2 project. It’s much easier then trying to reconfigure original project.

 

Then there are two options how to run the cores:

  1. You can use boot header to configure which cores should start its execution after reset. See section “57.1.3 Search boot header and boot options” in the reference manual for more details.
  2. And below you can find how to start Z4_b and Z2 cores by software if only Z4_a boots after reset. It’s copied from multicore project generated by S32DS, this code is already included there:


#define KEY_VALUE1 0x5AF0ul

#define KEY_VALUE2 0xA50Ful

 

void hw_init(void)

{

#if defined(DEBUG_SECONDARY_CORES)

       uint32_t mctl = MC_ME.MCTL.R;

#if defined(TURN_ON_CPU1)

       /* enable core 1 in all modes */

       MC_ME.CCTL[2].R = 0x00FE;

       /* Set Start address for core 1: Will reset and start */

#if defined(START_FROM_FLASH)

    MC_ME.CADDR[2].R = 0x11d0000 | 0x1;

#else

    MC_ME.CADDR[2].R = 0x40040000 | 0x1;

#endif /* defined(START_FROM_FLASH) */

 

#endif

#if defined(TURN_ON_CPU2)

       /* enable core 2 in all modes */

       MC_ME.CCTL[3].R = 0x00FE;

       /* Set Start address for core 2: Will reset and start */

#if defined(START_FROM_FLASH)

    MC_ME.CADDR[3].R = 0x13a0000 | 0x1;

#else

    MC_ME.CADDR[3].R = 0x40080000 | 0x1;

#endif /* defined(START_FROM_FLASH) */

 

#endif

       MC_ME.MCTL.R = (mctl & 0xffff0000ul) | KEY_VALUE1;

       MC_ME.MCTL.R =  mctl; /* key value 2 always from MCTL */

#endif /* defined(DEBUG_SECONDARY_CORES) */

}

Regards,

Lukas

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FAISAL0323
Contributor II

Thanks Lukas, 

it was really helpful and now I can successfully run two cores z0 and z2 parallelly.  but I met a little problem which I would like to discuss. 

I am using 160Mhz clock frequency for z0 core and PLL of 160mhz for z2 core. (As shown in figure below for PLL 160Mhz).  When I execute clock initialization for PLL 160mhz in z2 core, it also changes clock frequency of z0 core from 160mhz to PLL 160Mhz.  

FAISAL0323_0-1678176544131.png

 

Please let me know if different clock can be assigned to different cores. for example, simple 160mHz for zo core and 160PLL for z2 core? if yes , how we can do that so that they donot effect each other?

 

Best regards

Muhammad Faisal Khan

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lukaszadrapa
NXP TechSupport
NXP TechSupport

Notice that there's one PLL only. If you change the configuration by another core, it will affect whole system.

Max clock of Z4 cores is 160MHz, max clock of Z2 core is 80MHz.

Z4 is fed by clock called S160 and Z2 is fed by clock S80:

lukaszadrapa_0-1678180955603.png

If the PLL is already initialized, other cores should bear this in mind. If another clock is needed for some core/peripherals then it should be changed rather by dividers, so it will affect certain clock domain only.

Regards,

Lukas

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