STM timer Interrupt on all channels on MPC5748G

[shwetanraut]

I am implementing STM timers for creating an interrupts.

I am using STM2 timer and using all the 3 channels of STM2 timer .I am generating an interrupt at every 0.1us on STM2_0 and 0.3us on STM2_1 and so on. I am not clearing the count register as the interrupt is triggered.

In ISR definition of each channel I am adding the CMP value of each channel in the existing CMP value.

suppose for STM2_0 I am initializing the CMP register with 0x00000320 and for STM2_1 CMP register with 0x00000960. In ISR definition i am checking for the CMP register value whether its reached maximum value in the multiples of initialized value if its same or more than the threshold value I am again initializing the CMP register with the initial 0x00000320 value for example in case of STM2_0

I am getting an interrupt on both the channels but after time goes the interrupt on both the channels is stopped and once the the CNT register reaches maximum value of 0xFFFFFFFF and rolls back and when it reaches 0x00000320 it will generate an interrupt on STM2_0 channel.

I need a continuous interrupt on all the channels used how this problem can be solved?

[shwetanraut]

Hello Lukas,

Little corrections in above calculations:

For STM2 channel 0  I want an interrupt every 0.2 microseconds and on STM2 channel 1 I want an interrupt every 0.5 microseconds.

Input clock to STM is 80 MHz,  so 1/80MHz= 12.5 nanoseconds

For 0.2 microseconds interrupt CMP register needs to fill with 0.2 microseconds/12.5 nanoseconds which is 10 in Hexadecimal 

so 

ISR(STM2_0)
{
CMP_STM2_0 = CMP_STM2_0 + 0x00000010; 
STM_2.CHANNEL[0].CMP.B.CMP = CMP_STM2_0; /* Compare value for channel 0 of STM2*/

STM_2.CHANNEL[0].CIR.B.CIF = 1; /* clear STM2 CH0 IR flag */
}

For 0.5 microseconds interrupt CMP register needs to fill with 0.5 microseconds/12.5 nanoseconds which is 28 in Hexadecimal 

so

ISR(STM2_1)
{
CMP_STM2_1 = CMP_STM2_0 + 0x00000028; 
STM_2.CHANNEL[1].CMP.B.CMP = CMP_STM2_1; /* Compare value for channel 0 of STM2*/

STM_2.CHANNEL[1].CIR.B.CIF = 1; /* clear STM2 CH0 IR flag */
}

where CMP_STM2_0 is initialized with 0x00000010 and CMP_STM2_1 is initalized with 0x00000028.

Is these calculations are correct. In reference manual PIT calculation is mentioned but STM calculation is missing.

And how the priorities are handled? I am assigning the same priorities to all the channel interrupts.

[shwetanraut]

Hello Lukas,

Thanks for sharing the project.

I went through the project.Where are you enabling the particular timers and channels of STM?

void STM0_init(uint32_t channel, uint32_t vSTM_CMP)
{
STM_0.CHANNEL[channel].CMP.R = vSTM_CMP + STM_0.CNT.R; /* STM channel x compare value */
STM_0.CHANNEL[channel].CIR.R = 1; /* clear STM channel x interrupt */
STM_0.CHANNEL[channel].CCR.R = 1; /* enable STM channel x */
}//STM0_init

in above code part 

STM_0.CHANNEL[channel].CMP.R = vSTM_CMP + STM_0.CNT.R; /* STM channel x compare value */

why you are adding STM_0.CNT.R in compare register will it not affect the intervals of interrupts?

And when the CMP value reaches to maximum value how it is handled?

In my case I am initializing CMP register with one value and in ISR I am adding same value to it and not adding the CNT value in CMP register.

Same issue I am facing with the PIT timer

/* 0.5 us interrupt*/

ISR(PIT_CH0)
{

PIT.TIMER[0].TFLG.B.TIF = 1; /* clear PIT CH0 IR flag */

}

/* 0.9 us interrupt*/
ISR(PIT_CH1)
{

PIT.TIMER[1].TFLG.B.TIF = 1; /* clear PIT CH0 IR flag */
}

in this PIT timer case I am only getting PIT_CH0 interrupt always not getting PIT_CH1 anytime but if individually if I am checking I am able to get both the interrupts.

For STM2 channel 0  I want an interrupt every 0.2 microseconds and on STM2 channel 1 I want an interrupt every 0.5 microseconds.

Input clock to STM is 80 MHz,  so 1/80MHz= 12.5 nanoseconds

For 0.3 microseconds interrupt CMP register needs to fill with 0.1 microseconds/12.5 nanoseconds which is 18 in Hexadecimal 

so 

ISR(STM2_0)
{
CMP_STM2_0 = CMP_STM2_0 + 0x00000018;
STM_2.CHANNEL[0].CMP.B.CMP = CMP_STM2_0; /* Compare value for channel 0 of STM2*/

STM_2.CHANNEL[0].CIR.B.CIF = 1; /* clear STM2 CH0 IR flag */
}

ISR(STM2_1)
{
CMP_STM2_1 = CMP_STM2_0 + 0x00000028; 
STM_2.CHANNEL[1].CMP.B.CMP = CMP_STM2_1; /* Compare value for channel 0 of STM2*/

STM_2.CHANNEL[1].CIR.B.CIF = 1; /* clear STM2 CH0 IR flag */
}

where CMP_STM2_0 is initialized with 0x00000018 and CMP_STM2_1 is initalized with 0x00000028.

Is these calculations are correct. In reference manual PIT calculation is mentioned but STM calculation is missing.

And how the priorities are handled? I am assigning the same priorities to all the channel interrupts.

Could you help in this?

Thanks & Regards,

Shweta

[lukaszadrapa]

Hi,

it looks like some SW issue. Do you have simple project to see and reproduce the behavior?

Regards,

Lukas

[shwetanraut]

Hello lukas,

Using STM0 timer with all channels how I can use CNT register to get interrupts on all channels?

If I use only one channel from STM0 it works fine.but when i try to utilize all channels from STM0 using same CNT register I am not able to get the interrupts on desired interval

Any other implementation?

Regards,

Shweta

[lukaszadrapa]

Hi,

I did quick test and everything works as expected. My project is attached.

Regards,

Lukas

[asj]

I'm getting a similar kind of issue, when I'm trying to use STM1 for 1us. The interrupt assertion is improper, and the time interval observed is way over 10s. I have to wait for the counter to fall over 0xFFFFFFFFF, which is not what I want. I'm using two instances, STM0 and STM1, and STM0 is working for 1ms. I want STM1 for 1us. The clock I'm using is XBAR_DIV3_CLK. I gave CMP value as 0x85 for STM1, which is correct for 1us. Could you guide me through this?