STCU-MPC5744P

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STCU-MPC5744P

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aliceli
Contributor II

Dear NXP engineers,

 I have some questions about FCCU errors resources of MPC5744P. Would you help me?

 As described in AN5259,  MPC574xP FCCU Fault Sources, several NCFs related to STCU and BIST have been listed,including NCF[7]-NCF[9] and NCF[60]-NCF[64]. 

  1. First, NCF[7]  STCU2 fault condition (run in application mode) , does it means that MCU enter BIST mode unexpectedly? As we know, BIST will be performed when start-up and shun-down. It would not enter BIST mode when MCU is in application mode?  How and when will make  NCF[7] occur?
  2. Secondly,  how to clarify the NCF and CF? Does it predefined in DCF records? User cannot change a NCF to a CF?
  3. Thirdly, what's the difference between NCF[8-9] and NCF[60-64]. It seems like that NCF[8-9] contain NCF[60-64] and NCF[60-64] just a part of BIST results.  Why specailly list MBIST results in NCF[60-64] while no LBIST results.

Thank you for reading and I am looking forward to your answer.

Best wishes.

Alice

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petervlna
NXP TechSupport
NXP TechSupport

Hello Alice,

2. NCF[8] and NCF[9] cover LBIST and MBIST results. But I'm still confused why you list NCF 60-64 specailly? As you said, you have never get MBIST failure from tests. Do you think or guess the the failures of the specailly selected memory region listed in NCF60-64 are not included in NCF 8-9 ?

There is some reason for NCF60-64 rooted separately. As you can see those are core and peripheral memories. I expect that applied test pattern is different from one applied on common memories (Flash or RAM). Therefore I see reason for separate rooting for each of it. I am not able to tell you which pattern are exactly used here.

What is important for you is that you can see failing part of system/core memory via separate fault outputs.

Peter

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1,247 Views
petervlna
NXP TechSupport
NXP TechSupport

Hi Alice,

 I have some questions about FCCU errors resources of MPC5744P. Would you help me?

Yes

First, NCF[7]  STCU2 fault condition (run in application mode) , does it means that MCU enter BIST mode unexpectedly? As we know, BIST will be performed when start-up and shun-down. It would not enter BIST mode when MCU is in application mode?  How and when will make  NCF[7] occur?

Yes, you are right, BIST runs only in starup/shutdown mode. Not during application execution.

NCF[7]  indicates that  LBIST/MBIST control signals are getting into an unexpected state during application runtime. For example due to cosmic radiation, bit flip, or high magnetic field, etc...

It monitors unexpected behavior of BIST during application runtime.

Secondly,  how to clarify the NCF and CF? Does it predefined in DCF records? User cannot change a NCF to a CF?

This is old markings which comes from MPC56xx devices. On MPC57xx devices in FCCu module there are all fault Non Critical (NCF).

It is up to user how he will set up reaction path on particular fault. For example reset or interrupt ALARM.

On MPC56xx devices reaction on CF was always reset. Now we offer user possibility to decide which fault is critical for him and which not.

Thirdly, what's the difference between NCF[8-9] and NCF[60-64]. It seems like that NCF[8-9] contain NCF[60-64] and NCF[60-64] just a part of BIST results.  Why specailly list MBIST results in NCF[60-64] while no LBIST results.

The fault 8-9 covers also LBIST results. While 60-64 reports specially selected memory regions which I expect are not rooted to faults 8-9. Actually I have never get MBIST failure from tests. LBIST reports to 8-9.

Another question: what are the differences between NCF[8] BIST results (critical faults)  and NCF[9] BIST results (non-critical faults) ? Are there any examples for NCF[8] and NCF[9]?

This comes from STCU older architecture. This is quite complicated to explain here. So shortened there are only NCF even if you can see CF and NCF in FCCU. Both are NCF.

Have a nice day,

Peter

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aliceli
Contributor II

Hi Peter,

Thanks for your professional answer. 

Maybe I can understand your response in this way:

1. Due to some reasons, MCU  transitions itself to BIST mode during application mode. But I was thinking the probability of this failure may not be very high. 

2. NCF[8] and NCF[9] cover LBIST and MBIST results. But I'm still confused why you list NCF 60-64 specailly? As you said, you have never get MBIST failure from tests. Do you think or guess the the failures of the specailly selected memory region listed in NCF60-64 are not included in NCF 8-9 ?

3. There is no CF in MPC57xx. Therefore, for FCCU, there is no difference between NCF[8] and NCF[9]. 

Thanks for your kindly help again, I  really appreciate it.

Alice.

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1,248 Views
petervlna
NXP TechSupport
NXP TechSupport

Hello Alice,

2. NCF[8] and NCF[9] cover LBIST and MBIST results. But I'm still confused why you list NCF 60-64 specailly? As you said, you have never get MBIST failure from tests. Do you think or guess the the failures of the specailly selected memory region listed in NCF60-64 are not included in NCF 8-9 ?

There is some reason for NCF60-64 rooted separately. As you can see those are core and peripheral memories. I expect that applied test pattern is different from one applied on common memories (Flash or RAM). Therefore I see reason for separate rooting for each of it. I am not able to tell you which pattern are exactly used here.

What is important for you is that you can see failing part of system/core memory via separate fault outputs.

Peter

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aliceli
Contributor II

Hi Peter,

Thanks for your patient answer. It is quite useful for me.

Best wishes for you !

Alice

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aliceli
Contributor II

Another question: what are the differences between NCF[8] BIST results (critical faults)  and NCF[9] BIST results (non-critical faults) ? Are there any examples for NCF[8] and NCF[9]? These two faults are just too general.

Thanks

Alice

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