SPC5746C core HVD_LV_cold monitor problem

[kangjia123]

Hi expert,

I have active the over voltage detector HVD_LV_cold by the configuration as below, but the test result fail to meet the requirement. The MCU fail to reset when the MCU core voltage is overvoltage.

besides, I want to confirm that  the specific  manifestation for functional reset  is MCU reset, right?

1. MC_RGM_FERD: Bit14 and Bit17 are set to 0.

2. PMCDIG_MCR: bit 20 and bit21 are set to 1.

[PetrS]

Hi,

HVD feature can be enabled/disabled using UTEST_MISC[HVD_EN]. By default it is disabled.

BR, Petr