Hi Peter,
Thanks for your answer. I decided to try with usprg0 "register". But it seems to be a problem if using lockstep ?
I can read this in startup asm file:
;#**************************** Init Core Registers ****************************
;# The E200Z4 core needs its registers initialising before they are used
;# otherwise in Lock Step mode the two cores will contain different random data.
;# If this is stored to memory (e.g. stacked) it will cause a Lock Step error.
....
;# Init any other CPU register which might be stacked (before being used).
mtspr 1, r1 ;#XER
mtcrf 0xFF, r1
mtspr CTR, r1
mtspr 272, r1 ;#SPRG0
mtspr 273, r1 ;#SPRG1
mtspr 274, r1 ;#SPRG2
mtspr 275, r1 ;#SPRG3
mtspr 58, r1 ;#CSRR0
mtspr 59, r1 ;#CSRR1
mtspr 570, r1 ;#MCSRR0
mtspr 571, r1 ;#MCSRR1
mtspr 61, r1 ;#DEAR
mtspr 63, r1 ;#IVPR
mtspr 256, r1 ;#USPRG0
mtspr 62, r1 ;#ESR
mtspr 8,r31 ;#LR
Seems to me that using usprg0 is not really an option for me if lockstep is used?
It seems like the TBL and TBU does have a defined value at startup, perhaps I could use these registers instead?
What is your opinion ?
Regards,
Mathias