Question of MPC5777C clock setting

[Luke_Chun]

Hello Team

Could you check my question of MPC5777C clock setting?

As you known, MPC5777C’s maximum clock is Core->264MHz, eTPU->200Mhz.

However I could not find the combination PLL setting for using maximum clock both Core and eTPU..

I found only 264/192 or 260/200..

Could you check the possibility of the using maximum clock both core and eTPU?

Thank you.

[PetrS]

Hi Luke,

There is no clock configuration that sets PLLs for using maximum clock for both Core and eTPU. The closest we can get is PLL0 at 200MHz and PLL1 at 262.5MHz.

PLL0_PHI Reference = 40

PLL0DV[MFD] = 50

PLL0DV[PREDIV] = 5

PLL0DV[RFDPHI] = 2

PLL0DV[RFDPHI1] = 8

This configuration sets PLL0_PHI1 to be 50MHz at PLL0_PHI to be 200MHz

Then set PLL1 reference to be PLL0_PHI1, so

PLL1_PHI Reference = 50

PLL1DV[MFD] = 21

PLL1DV[RFDPHI] = 2

This will output 262.5MHz for PLL1_PHI.

BR, Petr