Progressive Clock Switching for MPC5744P

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Progressive Clock Switching for MPC5744P

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meedandeys
Contributor III

Is it mandatory to enable the Progressive Clock Switching for MPC5744P ?

Can the module still operate correctly without the PCS enabled ?

I have one failed MCU (5744P) which triggers resets when I configure the PLL to 120/150 Mhz without PCS enabled. The failed MCU works OK when I enable the PCS. All of the other MCU's does not exhibit the problem.

Could it be a part issue or some EOS damage ? Any thoughts ?

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meedandeys
Contributor III

Hello Peter, 

Thank you for the confirmation. 

I have one failed MCU (5744P) which triggers resets when I configure the PLL to 120/150 Mhz without PCS enabled. The failed MCU works OK when I enable the PCS. All of the other MCU's does not exhibit the problem.

Could it be a part issue or some EOS damage ? Any thoughts ?

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petervlna
NXP TechSupport
NXP TechSupport

Hi,

Simply measure VDD_HV and core voltage with scope.

You will most probably see the voltage drop when switch to PLL occurs and this cause your reset.

If this is the case, I expect yes, you have weak power supply for micro.

Peter

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meedandeys
Contributor III

Hello Peter, 

We are using NXP SBC (MC33907) which powers the VDD_HV. SBC datasheet indicates that dICORE/dt ≤ 2.0 A/μs, hence we are not using a weak power supply. Also we are not seeing this issue on the other boards which have the same power supply/layout.

Based on our testing we don't see any drop on the VDD_HV.  Any thoughts ?

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petervlna
NXP TechSupport
NXP TechSupport

Hi,

Try to do following:

After reset switch PLL on after like +5ms delay.

Also measure BLTRL pin after reset and core voltage to see the issue.

I expect there will be drop on core voltage when PLL is switch and reset is triggered by LVD.

Post here the waveform with following signals for failing part:

1. reset line

2.BCTL

3. Core voltage.

On correct sample it should looks like:

pastedImage_2.png

But on the failing part you will see reset on PLL swith on.

Peter

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petervlna
NXP TechSupport
NXP TechSupport

Hi,

No, it is not mandatory.

Its purpose is to limit current spikes when clock switching occurs.

For example: On our EVB I am not using it as there is a strong power supply.

Peter

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