Nested IRQ in MPC5606B problem

[snafu]

Hello,

I cannot figure out how to setup nested IRQ at MPC5606B  when using FreeRTOS. Write to INTC_EOIR at the end of ISR doesn't lower the INTC.CPR.PRI.

I want to use INTC.CPR.PRI field. My understanding is such as

• INTC signals external IRQ to z0 core
• z0 core enters IVOR4 exception
• I prepare stack frame for all registers
• I store register values into stack frame
• store r1 stack pointer in pxCurrentTCB structure
• re-enable interrupts and jump into interrupt handler. Interrupt handler vector is gained from INTC_IACKR. When reading INTC_IACKR, INTC.CPR.PRI field pushes current PRI value into internal stack and current IRQ PSR value is stored into INTC.CPR.PRI.
• In interrupt I can enter critical section enclosed in portSET_INTERRUPT_MASK_FROM_ISR/portCLEAR_INTERRUPT_MASK_FROM_ISR
• Upon ISR exit I turn off interrupts and restore all registers from pxCurrentTCB
• Aknowledge IRQ by writing zero into INTC_EOIR. This write shall pop previous value into INTC.CPR.PRI

Problem is that when writing INTC_EIOR, INTC.CPR.PRI is left unchanged and the high value prevents other interrupts from being raised. I tried several writes to INTC_EIOR one after another but to no avail.

When I want to try to write into INTC.CPR.PRI manually, it doesn't work either. I monitor the value in debugger. I use pemicro multilink.

When I don't use nested interrupts (don't reenable interrupts in IVOR4 and make portSET_INTERRUPT_MASK_FROM_ISR/portCLEAR_INTERRUPT_MASK_FROM_ISR empty) everything works fine.

I enclosed the whole IVOR4 code as attachement.

Thank you for any help .

Pavel

My portSET_INTERRUPT_MASK_FROM_ISR/portCLEAR_INTERRUPT_MASK_FROM_ISR implementation

#define portSET_INTERRUPT_MASK_FROM_ISR() \
	({\
	asm("wrteei  0"); \
	int ret = INTC.CPR.B.PRI; \
	INTC.CPR.R=configMAX_SYSCALL_INTERRUPT_PRIORITY;\
	asm("mbar");\
	asm("wrteei  1");  \
	asm("isync");  \
	ret;})

#define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue ) \
	asm("mbar");\
	asm("wrteei 0");   \
	INTC.CPR.B.PRI=uxSavedStatusValue; \
	asm("wrteei  1");

[davidtosenovjan]

Have you write this handler yourself? Or where it is taken from?

I am not sure whether syntax in your epilogue is correct, we have been using following (taken from different MCU as I wanted to show VLE code):

se_li r3,0
e_lis r4, INTC_EOIR_PRC0@ha # Load upper half of EIOR address to r4
e_add16i r4,r4, INTC_EOIR_PRC0@l # Load lower half of EIOR address to R4
e_stw r3, 0(r4) # Write 0 to INTC_EOIR, address 0xFFF4 8018

Also why you are accessing CPR register at that point?

[snafu]

Hello and thank you for the reply,

the line 'e_stw %r4, INTC_CPR@l(%r3)' is really nonsens. I left it there by mistake after my desparete attempt to clear the CPR register manually.

I deleted the line and used your code, but the situation is the same. CPR is not cleared after INTC_EOIR.

I enclosed my new source.

I don't remember exact source of the handler , but it originated from example project and I added FreeRTOS support. I came back to it to make nested IRQs now.