MPC5xMUC FlexCAN Tx and Rx interrupt question

[大大许]

I want to konw  MPC5744 FlexCAN module hasn't a send completion entry interrupt function and a receive completion entry interrupt function?  

I through computer software to send a standard data frame to my evaluate board , I through check interrupt flag to read data. But i want to process the receive data  by receiving interrupts, I set FlexCAN Interrupt mask regiseter to enable interrupt receive function. But this code is not triggle interrupt function,the corresponding interrupt register is already in set 1.

[wongdavid]

5744中的can通信，你处理过接收端可以让接收端一对多通信吗？

[剑明肖]

5744中CAN通信，接收多个不同messgeID的模式（接收端一对多通信），你能成功吗？我没搞定

[PetrS · Accepted solution]

Hi,

CAN[nbModule]->IMASK1.R = 0x00F00000;     does not enable MB8 and MB9 interrupt. In fact it enables MB23-MB20 interrupts.

You should use CAN[nbModule]->IMASK1.R = 0x00000300;     //set MB[8] receive interrupt and MB[9] send interrupt

BR, Petr

[大大许]

FlexCAN interrupt setting is follow

INTC_0.PSR[524].B.PRIN  =  INT_CAN_PRIORITY;        //CAN ISR IRQ CPU degree

 CAN[nbModule]->IMASK2.R = 0x00000000;                   //FlexCAN module
 CAN[nbModule]->IMASK1.R = 0x00F00000;     //set MB[8] receive interrupt and MB[9] send interrupt

Is there anything wrong with my setup?

[aero72]

Make certain you're clearing the interrupt and also 'New data in buffer' flags by writing a '1' to the relevant register bit to clear it. Only by doing this will you know whether you're getting a new message or re-processing an old one.

[大大许]

Hi,

I'm sure that the corresponding flag bits in the interrupt flag register are clear, and I'm sure that the data received by querying is up to date, not the previous one.

The code received a standard data frame by compute software ,the relevant interrupt mask register bit is enable ,and  relevant interrupt flag register is set.

The program does not perform interrupt subroutines .

thanks