MPC5777M peripheral core isync

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MPC5777M peripheral core isync

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jschloss
Contributor III

I'm trying to use the GetResource example on the peripheral core of the MPC5777M, but I get a compiler error that isync is not available in VLE mode - "Error: Illegal instruction for VLE mode: `isync'"

GetResource:
wrteei 0 # disable external interrupts to the Processor
raise PRI # Write to CPR, cache inhibit, guarded
mbar # flush out writes from store buffer
wrteei 1 # enable external interrupts to the Processor
isync # re-fetch Processor pipeline

Is there a way to build in bookE mode for the e200z4 on the 77M? Or is there a different instruction I should be using to force instruction sync?

Thanks,

Jacob

EDIT, did more research:

Is the correct instruction se_isync?

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davidtosenovjan
NXP TechSupport
NXP TechSupport

Yes, se_isync is correct syntax.

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636 Views
davidtosenovjan
NXP TechSupport
NXP TechSupport

Yes, se_isync is correct syntax.

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