MPC5777C online bist LB_CTRL[SHS] bit configuration in AN5288 inconsistent with RM description

[Zhongling_Lang]

Hi team,

I checked attachments[MPC5777C_on-line_bist_2N45H.c,MPC5777C_on-line_bist_3N45H.c ] in AN5288 and found that LB_CTRL[SHS] bit configuration inconsistent with RM description.

1.These two on-line bist files[MPC5777C_on-line_bist_2N45H.c,MPC5777C_on-line_bist_3N45H.c ] both configure the LB_CTRL[SHS] bit with 0, but the RM said that the SHS bit should have a value of 001b or grater.

2.But for individual lbist files[[MPC5777C_on-line_lbist_2N45H.c,MPC5777C_on-line_lbist_3N45H.c ], LB_CTRL[SHS] bit have value 3.

So why have different value for SHS bit, because RM said it should a value of 001b or greater? 

Customer have issue with on-line bist for SHS bit with 0 value, so please help to double check it.

[Zhongling_Lang]

Because the individual LBIST configuration have PLL with 200Mh and the other one have PLL 50Mhz. So what appropriate parameter of SHS bit value? or just SHS bit with 0 when PLL is 50Mhz and SHS with greater value 3 when PLL is 200Mhz as AN5288 configured.

[petervlna]

Hello,

So why have different value for SHS bit, because RM said it should a value of 001b or greater? 

This is because you are looking at MBIST + LBIST configuration mode. In such case you cant run at 200MHz and you need to set SHS.

I expect that this is fully dependent on your clock configuration for BIST.

Customer have issue with on-line bist for SHS bit with 0 value, so please help to double check it.

If he is running full Online BIST then SHS =0 will give you errors. You need slower clock.

Would be good first to know which kind of online test customer is running, and what are his clock settings for such tests. As the clock is set in application as well as SHS before the test is executed.

Have for example look at my example for online LBIST only (I am using SHS =1)

Best regards,

Peter