MPC5777C - Power up sequence

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MPC5777C - Power up sequence

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kardos_michal
Contributor I

Good day,

in AN5268 - MPC5777C Hardware Requirements_Example Circuits (Rev. 0.06 / 2016), Chapter 3.4, you write "Power up VDDPMC / VDDPWR, VDDA_MISC, VDDA_EQ, and all VDDEx / VDDEHx supplies first and then power up VDD."

We made an external power supply 1.25 V, 3.3 V and 5 V with a sequence that the 1.25 V (VDD) rises by 200 ms after a voltage of 3.3 V and 5 V. With such a sequence, the processor on the evolution board MPC5777C-DEVB_QSG (SCH-29962) did not start. By measuring, we found that the evolution board has power up of 1.25 V almost at the same with a voltage 3.3 V and 5 V. We then adjusted our external power supply so that all voltage sources power up at the same time and the processor started up.

Is there any limit (min., nom., max.) for the delay of the supply 1,25V power up  after 3.3V and 5V? In our experience, 200 ms is too much.

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kardos_michal
Contributor I

Hello Peter,
Thank you for your response. I have no further questions about that.

Yes, it was meant NXP evolution board.

Best Regards

Michal

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

evolution board MPC5777C-DEVB_QSG (SCH-29962)

Do you mean NXP evaluation board?

We made an external power supply 1.25 V, 3.3 V and 5 V with a sequence that the 1.25 V (VDD) rises by 200 ms after a voltage of 3.3 V and 5 V

The micro will be held in reset until the core voltage rise to 1.2V. No execution is performed.

By measuring, we found that the evolution board has power up of 1.25 V almost at the same with a voltage 3.3 V and 5 V.

Yes, as this is most common case when you want to start your application as soon as possible after power is applied.

Is there any limit (min., nom., max.) for the delay of the supply 1,25V power up after 3.3V and 5V? In our experience, 200 ms is too much.

No, there is no limit defined for that. Usually you want to have micro fully operational in less then 100ms.

power up sequence with all tests could take 20-40ms + startup code another 50ms. So you apply the core voltage in same time as VDD_HV or if its generated from HV, then there a slight delay.

Best regards,

Peter

 

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kardos_michal
Contributor I

Hello Peter,
Thank you for your response. I have no further questions about that.

Yes, it was meant NXP evolution board.

Best Regards

Michal

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