MPC5777C DSPI TX FIFO COUNTER Increment

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MPC5777C DSPI TX FIFO COUNTER Increment

506 Views
prathapvc
Contributor III

Hi,

I am trying the transfer and receive sixteen 16 bits words from master to slave and slave to master through DSPI using MPC5777C

The TX FIFO COUNTER  in DSPI_SR is not incrementing to more than 4 while more than four 16 bits words are assigned to DSPI_PUSHR

Please refer the following code for configuration and data transfers.

static void DSPI_A_Init(void)
{

/*Configured Slave mode */
DSPI_A.MCR.R =0x40010001; 
DSPI_A.MODE.CTAR_SLAVE[0].R = 0x38000000;
DSPI_A_CTAR0 = 0x78021004;

/* Exit HALT mode: go from STOPPED to RUNNING state*/
DSPI_A.MCR.B.HALT = 0x0;
}

static void DSPI_B_Init(void)
{

/*Configured Master mode */
DSPI_B.MCR.R =0xC0010001; //0x80010001;
DSPI_B_CTAR0 = 0x78021004;

/* Exit HALT mode: go from STOPPED to RUNNING state*/
DSPI_B.MCR.B.HALT = 0x0;
}

static void DSPI_GPIO_Init(void)
{

/*DSPI_A*/

SIU.PCR[96].R = 0x05D3; //DSPI_A_CS0
SIU.PCR[93].R = 0x05D3; //DSPI_A_SCK
SIU.PCR[95].R = 0x06D3; //DSPI_A_SOUT
SIU.PCR[94].R = 0x05D3; //DSPI_A_SIN
/*DSPI_B*/
SIU.PCR[105].R = 0x06D3; //DSPI_B_CS0 //Input
SIU.PCR[102].R = 0x06D3; //DSPI_B_SCK
SIU.PCR[104].R = 0x06D3; //DSPI_B_SOUT
SIU.PCR[103].R = 0x05D3; //DSPI_B_SIN

}

int main (void)
{
vint32_t counter = 0,size = 0,i = 0;
char data = 0;
char ctest[80];

/* Hardware initialization */
      HW_init();
/* PLL0 for 64MHz */
      SysClk_Init();

DSPI_GPIO_Init();
DSPI_A_Init();
DSPI_B_Init();


DSPI_B.MCR.B.HALT = 0x1;
DSPI_A.MCR.B.HALT = 0x1;
for(i=0;i<=16;i++)
{
      /*SPI Transmit and Read*/

      if(i <= 15)
      {

            DSPI_A.PUSHR.PUSHR_SLAVE.R = 0x00011234+i;
            DSPI_B.PUSHR.PUSHR.R = 0x80015678+i;
      }
      else
      {
            DSPI_A.PUSHR.PUSHR_SLAVE.R = 0x00011234+i;
            DSPI_B.PUSHR.PUSHR.R = 0x08015678+i;
        }

}

DSPI_B.MCR.B.HALT = 0x0;
DSPI_A.MCR.B.HALT = 0x0;

for(i=0;i<=16;i++)
{
      ReadDataDSPI_A();
      ReadDataDSPI_B();
      vDelay(10);
}

while(1)
{

;
}
return 0;
}

void ReadDataDSPI_A(void)

{
      while (DSPI_A.SR.B.RFDF != 1) { } /* Wait for Receive FIFO Drain Flag = 1 */
      RecDataSlave = DSPI_A.POPR.R; /* Read data received by slave SPI */

      DSPI_A.SR.R = 0x80020000; /* Clear TCF, RDRF flags by writing 1 to them */
}

void ReadDataDSPI_B(void)

{
     while (DSPI_B.SR.B.RFDF != 1) { } /* Wait for Receive FIFO Drain Flag = 1 */
      RecDataMaster = DSPI_B.POPR.R; /* Read data received by master SPI */

      DSPI_B.SR.R = 0x90020000; Clear TCF, RDRF, EOQ flags by writing 1 */
}

1 Reply

432 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

there is only 4 deep TX/RX FIFO on DSPI of the MPC5777C.

So the behavior you got is correct.

BR, Petr