MPC5775K SPI

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MPC5775K SPI

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ronliu
Contributor IV

Hi,

I'm working with MPC5775K now. Is there any code sample about SPI module configuration to share?

Thanks.

Regards,

Ron

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sandeepnagaraja
Contributor III

Hi Martin martinkovar

             As the SPI Driver for MPC5777M is working good, we are working on the Multi-Master Mode of the SPI Driver for MPC577M.As each DSPI module consists of more than 3 slave select pins and i tried initializing two SS pins of DSPI_1 module and connected to chip select pins of DSPI_2 and DSPI_3 module.

            WIth my initial testing of individual configuration of DSPI_2 and DSPI_3 as master and DSPI_1 as slave is working, but as i initialize two SS pins of DSPI_1 and connect to CS pins of DSPI_2 and DSPI_2,i could communicate with only one module which has got the latest SS pin cofig connected(if i initialize two SS pins, only the lastest SS initialization is considered).

Hardware Connection:

                        Function                        Master1(DSPI_2)              Master2(DSPI_3)                    Slave(DSPI_1)

                  CS<->SS                                  PA[12] <------------------------------------------------------> PH[14]

                   CS<->SS                                                                              PC[7] <----------------------> PE[5]

                  SCK<->SCK<->SCK               PL[14]<----------------------->PH[12]<---------------------->PF[5]

                  SOUT<->SOUT<->SIN          PL[12]<----------------------->PH[13]<----------------------->PF[4]

                   SIN<->SIN<->SOUT             PL[13]<----------------------->PL[5]<-------------------------->PM[10]

          Is multi master mode is supported for SPI in MPC5777M? any tips regarding the issue would be helpful.

    Regards

Sandeep Nagarajan

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martin_kovar
NXP Employee
NXP Employee

Hello,

I have been searching for information about Multi-master SPI bus, but all information are little bit skeptic. There are many issues you have to solve.

Also, your hardware connection is not correct, because only chip select 0 is enable, when DSPI module is in slave mode.

pastedImage_1.png

Regards,

Martin

1,461 Views
sandeepnagaraja
Contributor III

martinkovar

Hi Martin,

            We really appreciate the kind of help we got from YOU & NXP  Community. We have met our goal in developing the SPI Driver for MPC5777M with your support.    

             We look forward to associate with the NXP community in near future.

Regards

Sandeep Nagarajan

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martin_kovar
NXP Employee
NXP Employee

Hi,

thank you very much for your positive post. I appreciate that and I am very glad that my example helped you. Have a nice time.

Regards,

Martin

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sandeepnagaraja
Contributor III

martinkovar

Hi Martin,

         As you suggested in the last response, i made changes and tried the polling way,

1.The transfer from master is working good.

       Reason: I checked using a DSPI SR status register,as shown in the code.

2.But the slave receive buffer is still reading 0(zero).

Doubt:

1. As the master is successfully transferring the data out,will that prove Master clock is generating good?

Code:

int main(void)
{

   HW_Init();

    SPI2_Init();    //master
    SPI1_Init();     //slave

    /* Initialize MASTER DSPI_2 response to Slave,with EOQ */
    /*WIth the status register EOQ, used to check the transfer of data from master*/
    DSPI_2.PUSHR.PUSHR.R = 0x08015678;       //EOQ is enabled

    /* Transmit data from slave SPI to master */
    DSPI_1.PUSHR.PUSHR.R = 0x00001234;

    while(DSPI_2.SR.B.EOQF == 0);                          //Checking for EOQ flag, which is passing.
    RecDataSlave = DSPI_1.POPR.R;  //Reading slave receive buffer - which reads 0(zero), checked using GDB debugger.
    RecDataMaster = DSPI_2.POPR.R;  //Reading the master receive buffer.
    DSPI_0.SR.R = 0xFCFE0000;            //clearing slave status register
    DSPI_2.SR.R = 0xFCFE0000;            //Clearing Master status register.

}

Hardware Connection:

Pins                                    Master (DSPI_2)                                   Slave(DSPI_1)  

CS                                       (PL[11])  <------------------------------------- >   PH[14]

SCK                                     PL[14]  <-----------------------------------------> PF[5]

SIN - SOUT                      (SIN)PL[13] <------------------------------------------>PM[10](SOUT)

SOUT-SIN                         (SOUT)PL[12]<----------------------------------------->PF[4](SIN)

GPIO Initialization:

static void GPIO_Init(void)
{
    /*Master GPIO Configuration, DSPI_2*/
    SIUL2.MSCR_IO[187].R = 0x32840003;    //DSPI2_CS2 PL[11] which is declared low in DSPI_MCR to start comm.

    SIUL2.MSCR_IO[190].R = 0x32840003;   //DSPI2_SCK  PL[14]

    SIUL2.MSCR_IO[188].R = 0x32840003;   //DSPI2_SOUT PL[12]

    SIUL2.MSCR_IO[189].R = 0x308C0000;  //DSPI0_SIN
    SIUL2.MSCR_MUX[374].B.SSS = 0x8;   //DSPI0_SIN

    /*Slave GPIO Configuration, DSPI_1*/
    SIUL2.MSCR_IO[126].R = 0x308C0003; //DSPI1_CS0   PH[14]

    SIUL2.MSCR_IO[85].R = 0x308C0000; //DSPI1_SCK  PF[5]
    SIUL2.MSCR_MUX[372].B.SSS = 0x1;       //884-512 = 372

    SIUL2.MSCR_IO[84].R = 0x308C0000; //DSPI1_SIN    PF[4]
    SIUL2.MSCR_MUX[371].B.SSS = 0x3;

    SIUL2.MSCR_IO[202].R = 0x32840004; //DSPI1_SOUT   PM[10]
}

Kindly review and let us know your suggestions and corrections to be made on the issue.

Regards

Sandeep Nagarajan

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martin_kovar
NXP Employee
NXP Employee

Hi,

I created simple DSPI example for MPC5777M. Please check.

https://community.nxp.com/docs/DOC-333693 

Regards,

Martin

1,461 Views
sandeepnagaraja
Contributor III

ronliu

Hi Ronliu,

       In regard to your code screen shot under transfer data section in the for loop, you have not specify which module push register you are writing and the pop register you are checking the RFDF flag and retreiving data.

      As i am designing the master slave communication declaring DSPI_0 as master and DSPI_1 as slave, and trying to write the data in the master push TXDATA and trying to retreive the data from the RXDATA from slave pop register.

     So if you tel  about your transfer section, it would be easy for me to correct my mistakes.

Regard

Sandeep Nagarajan.

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sandeepnagaraja
Contributor III

martinkovar

Hi Martin,

              I modified the GPIO initialization section, I configured DSPI_0 as master and DSPI_1 as slave,

I tried transmitting the data from master to slave through polling method, GPIO section is as below,

static void GPIO_Init(void)

{

SIUL2.MSCR_IO[69].R = 0x32840001; //DSPI0_CS0 PE[5]

SIUL2.MSCR_MUX[69].B.SSS = 3;

SIUL2.MSCR_IO[52].R = 0x32840001; //DSPI0_SCK PD[4]

SIUL2.MSCR_MUX[52].B.SSS = 3;

SIUL2.MSCR_IO[53].R = 0x32840001; //DSPI0_SOUT PD[5]

SIUL2.MSCR_MUX[53].B.SSS = 3;

SIUL2.MSCR_IO[73].R = 0x308C0000; // PE[9]

SIUL2.MSCR_MUX[880-512].B.SSS = 0x2; //DSPI0_SIN

SIUL2.MSCR_IO[126].R = 0x308C0001; //DSPI1_CS0 PH[14]

SIUL2.MSCR_MUX[126].B.SSS = 3;

SIUL2.MSCR_IO[46].R = 0x308C0001; //DSPI1_SCK PC[14]

SIUL2.MSCR_MUX[884-512].B.SSS = 1;

SIUL2.MSCR_IO[45].R = 0x308C0000; //DSPI1_SIN PC[13]

SIUL2.MSCR_MUX[883-512].B.SSS = 2;

SIUL2.MSCR_IO[47].R = 0x32840001; //DSPI1_SOUT PC[15]

SIUL2.MSCR_MUX[47].B.SSS = 4;

}

As already in the SPI initialization section for both master and slave, the modules are put on running state by declaring

halt =0; So in main function, i just tried writing to the transmit buffer of DSPI_0(push register) and tried

reading the data on the DSPI_1 receive buffer(pop register) on the slave, where i could not read,( i tried reading under debug mode)

Main function is :

int spi_main(void)

{

  //HW_Init();

  Sysclk_Init();

  InitPeriClkGen();

  GPIO_Init();

  SPI0_Init();

  SPI1_Init();

  /* Transmit data from master to slave SPI with EOQ */

  DSPI_0.PUSHR.PUSHR.R = 0x5678;

  RecDataSlave = DSPI_1.POPR.R;

 / * Clear ALL status flags by writing 1 */

  DSPI_1.SR.R = 0xFCFE0000;

  return 0;

}

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martin_kovar
NXP Employee
NXP Employee

Hi,

I posted an answer to the following thread:

https://community.nxp.com/message/863841?commentID=863841#comment-863841 

Regards,

Martin

1,464 Views
sandeepnagaraja
Contributor III

martinkovar‌:

One other issue is that to declare the SPI pins exceeding 512 in I/O signal table, As per the I/O Signal table for MPC5777M, the pin numbers for DSPI_2 modules are around 880... so what i am trying is that

ex: considering SIN_1 of DSPI_1

SIN_1 = 883(SIUL2_MSCR), PH[9](port pin detail), 0000 0101(MSCR_SSS)

Declared as:

SIUL2_MSCR_IO(883-512).R = 0x308C0000; 

SIUL2_MSCR_MUX(883-512).B.SSS = 5;

Kindly correct me, if m wrong.

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martin_kovar
NXP Employee
NXP Employee

Hi,

if you want to route input signal from DSPI_1 SIN_1 to PAD PH9 (MSCR 121), please use following settings:

SIUL2_MSCR_IO(121).R = 0x308C0000; (set input buffer and other settings for PH9 pad)

SIUL2_MSCR_MUX(883-512).B.SSS = 5; (route DSPI_1 SIN_1 signal to pin PH9)

When you want to use MSCR_MUX registers you have to subtract 512 in array index, because of header file definition (please see figure below)

pastedImage_1.png

Regards,

Martin

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sandeepnagaraja
Contributor III

Hi Martin,

          I Checked the Auxiliary clock section and found solution for the previous query, As per the reference manual, AC0 is assigned for the DSPI peripheral,so will the below function do define a peripheral clock for DSPI module( baud rate configured for 40MHz)

static void InitPeriClkGen(void)

{

   MC_CGM.AC0_SC.B.SELCTL = 0x2; // Select PLL0 for auxiliary clock 0

   CGM.AC0_DC3.B.DIV = 7;     // MC_CLK : Enable aux clk 0 div by 8(DIV+1)  ((320MHz/8)=40 MHz)

   }

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sandeepnagaraja
Contributor III

Hi Martin,

            Thanks for your response and i have a query regarding the system frequency(fsys),

1.how fsys is considered 66.5MHz,

     * SCK baud rate = (fsys/PBR) * [(1+DBR)/BR]
     * SCK baud rate = (66.5MHz/5) * [(1+0)/16] = 0.83MHz

2.Is that possible to configure different values for fsys ?

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sandeepnagaraja
Contributor III

Hi Martin,

                 In regard to the hardware connection between a master and slave i am trying below setup,

Master(DSPI_0)                             Slave(DSPI_2)

SCK_0     <------------------------------------->  SCK_2

SOUT_0  <------------------------------------->  SIN_2

SIN_0 <------------------------------------------> SOUT_2

SS_0<------>GND

CS_0<------------------------------------------->SS_0

      Is my connection setup is correct , or am i connecting wrong?

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martin_kovar
NXP Employee
NXP Employee

Hi,

please look at the following code. It is my DSPI setup for MPC5775K.

/********************DSPI0 - Master********************************/

SIUL2.MSCR[36].R = 0x32840001; //DSPI0_CS0 - output
SIUL2.MSCR[37].R = 0x32840001; //DSPI0_SCK - output
SIUL2.MSCR[38].R = 0x32840001; //DSPI0_SOUT - output
SIUL2.MSCR[39].R = 0x308C0000; //DSPI0_SIN  - input

/********************DSPI2 - Slave**********************************/

SIUL2.MSCR[10].R = 0x308C0001; //DSPI2_CS0 - input
SIUL2.IMCR[10].B.SSS = 2;

SIUL2.MSCR[11].R = 0x308C0001; //DSPI2_SCK - input
SIUL2.IMCR[8].B.SSS = 2;

SIUL2.MSCR[13].R = 0x308C0000; //DSPI2_SIN - input
SIUL2.IMCR[9].B.SSS = 2;

 SIUL2.MSCR[12].R = 0x32840001; //DSPI2_SOUT - output

and the connection is following

                      P18.0 to P18.5 (CS_0)
                      P18.2 to P18.7 (SCK)
                      P18.3 to P18.9 (SIN - SOUT)
                      P18.4 to P18.8 (SOUT - SIN)

Regards,

Martin

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sandeepnagaraja
Contributor III

Hi Guys,

      We are porting from MPC5748G to MPC5777M,We have procurred MPC57XX motherboard and a MPC5777M_512DS daughter board, i referred the reference manual and a datasheet, but we couldnt trace the SPI Specific pins(SCK,SOUT,SIN,SS(bar)) in the evaluation board, Could any one point out the SPI pins in the MPC57XX evaluation board.

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martin_kovar
NXP Employee
NXP Employee

Hi,

please look at the I/O signal description sheet. I do not know, why this excel file is not attached to newest reference manual placed on website.

Regards,

Martin

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sandeepnagaraja
Contributor III

As we are designing a SPI driver for MPC5777m based on your code for MPC5775k, The control registers bit mapping could be resolved with the reference manual u just shared, if i am not stressing up, could you kindly shar I/O signal table for MPC5775k, i am just checking for DSPI_0 and DSPI_1 specific pins for GPIO_INIT function.

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sandeepnagaraja
Contributor III

Great, Thanks for the quick reply Martin.

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sandeepnagaraja
Contributor III

We have a datasheet  and reference manual for mpc5777m, my query is that, the registers like MCR, CTAR,MSCR are similar or different from each other, if both are same, then i could follow the mpc5777m for register bit mapping.

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