MPC5775B system stuck when FlexCAN PE clock use Peripheral clock

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MPC5775B system stuck when FlexCAN PE clock use Peripheral clock

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MarkFan
Contributor III

Hi,

   My purpose is when 40MHz XOSC has problem, after system reset, all clock(PLL0, PLL1) refer to IRC, ( FlexCAN PE clock use Peripheral clock)

   1. I found system stuck in FLEXCAN_DRV_Init(); ->  use a defective XOSC 

   2. Remove FlexCAN driver, system has no issue  ruining on IRC clock.

   3. Hardware connected with XOSC,  but ruining on IRC clock, it also no issue.   

   It seems like FLEXCAN only run on functional XOSC even PE clock use Peripheral clock.

   Is there other configurations need to set to  FlexCAN driver/registry ruining on IRC clock without XOSC ?

   Thanks for any help.

Best regards,

Mark

   

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3 Replies

387 Views
MarkFan
Contributor III

Hi Petr,

    Thanks for your reply.

   1. SDK version is 2.1.7. 
   2. In  FLEXCAN_DRV_Init()      
    if(FLEXCAN_IsEnabled(base))     -> Ture 
   {
          FLEXCAN_EnterFreezeMode(base);
          FLEXCAN_Disable(base);   ->  stuck in here
    }
 
   3.  FLEXCAN_Disable
 
     void FLEXCAN_Disable(CAN_Type * base)
    {
          /* To access the memory mapped registers */
          /* Entre disable mode (hard reset). */
          if(((base->MCR & CAN_MCR_MDIS_MASK) >> CAN_MCR_MDIS_SHIFT) == 0U)
          {
               /* Clock disable (module) */
               base->MCR = (base->MCR & ~CAN_MCR_MDIS_MASK) | CAN_MCR_MDIS(1U);
 
               /* Wait until disable mode acknowledged */
               while (((base->MCR & CAN_MCR_LPMACK_MASK) >> CAN_MCR_LPMACK_SHIFT) == 0U) {}  -> system hung in here 
        }
}
 
I would like to know that FLEXCAN only run on functional XOSC or not?
 
Thanks for any help.
Mark
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358 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

the RM states below for clocks used in FlexCAN module

PetrS_0-1690457961505.png

There is ERR008341 regarding entering Freeze or low power mode, so check errata document and implementation in your SDK, which looks little bit outdated, I think.
However both module soft reset and low power request mentioned perform acknowledgement procedure across clock domains, and if one clock is failed, it most probably does not finish that request.

BR, Petr

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469 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

could you please specify the SDK version you have and the line the code hangs?
After reset the module is active and should be in Freeze mode with PE clock running from XOSC. 
To change to peripheral clock the module should be disabled first. And in case PE clock is missing, maybe moving to disable, freeze mode or module reset is not acknowledged.
Try to check module MCR, CTRL1, ESR1 registers in debugger.

BR, Petr

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