MPC5748G (cut2) Compare-and-Store via DMSC not working

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MPC5748G (cut2) Compare-and-Store via DMSC not working

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ali_taqweem
Contributor I

Hi,

I have been trying to use atomic Compare-and-Store DMSC instruction, but it gives machine check exception. Not able to with BUS_DRERR, MAV, G and LD set in MCSR. The address range is accessible (other DMSC operations are working I tried Load-and-set-1 (bit)). Here is the code that I am using:

foo:
    e_lis   r5, 0x9000                        ; Create decoration: cast.h, CD16 0
foo_lock:
    lhdcbx  r4, r5, r3                          ; Atomic set resource, caching inhibited
    se_cmpi r4, 0x0
    e_bne-  foo_lock
    se_blr                                      ; Return

Help shall be appreciated.

3 Replies

369 Views
ali_taqweem
Contributor I

Hi Lukas,

I think you misunderstood me. LAS1 (opcode 0x06) works on my side as well.

I want to use CAST (opcode 0x09), it give machine check.

Regards,
Ali

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369 Views
lukaszadrapa
NXP TechSupport
NXP TechSupport

CAST can be used with store instructions. lhdcbx  is load instruction.

Regards,

Lukas

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369 Views
lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi Ali,

the decoration information in r5 is not correct. It's not valid opcode, so machine check is triggered. You can find in the reference manual:

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If I use opcode 0x6.... instead of 0x9..., the instruction is executed successfully.

Regards,

Lukas

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