MPC5748G: How generate ADC EOC interrupt only for one channel at a time?

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MPC5748G: How generate ADC EOC interrupt only for one channel at a time?

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danielnäslund
Contributor III

I'm writing an ADC driver that does not use any provided NXP SDKs at the moment.

I can setup a handful channels.

  • I can read them by busy-waiting for their status flags to be set.
  • I can trigger EOC interrupts. Then all configured channels CEOFCRx register are set.

But I only want an EOC interrupt to be triggered for one particular channel at a time. There's the CIMRx registers.

  • But if I try to enable EOC interrupt for just one channel by writing to CIMRx, I don't get any interrupts
  • And if I set ADC_0.IMR.B.MSKEOC then all channels configured in NCMRx are indicated as having new values.

See attached adc_example.c for an example of the code I've written.

 

 

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

to get an interrupt you need to set both CIMR (one or more bits) and MSKEOC. Then within interrupt you should clear asserted bits in CEOCFRx and EOC bit in ISR.
For bit clearing use register access. So instead of ADC_0.CEOCFR0.B.EOCCH11 = 1; use ADC_0.CEOCFR0.R = 1<<11;

In One-Shot mode (MCR[MODE] = 0), a sequential conversion specified in the NCMRn mask registers is performed only once. At the end of each conversion, an EOC interrupt is issued if enabled by the corresponding mask fields in CIMRn and IMR).

BR, Petr

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409 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

to get an interrupt you need to set both CIMR (one or more bits) and MSKEOC. Then within interrupt you should clear asserted bits in CEOCFRx and EOC bit in ISR.
For bit clearing use register access. So instead of ADC_0.CEOCFR0.B.EOCCH11 = 1; use ADC_0.CEOCFR0.R = 1<<11;

In One-Shot mode (MCR[MODE] = 0), a sequential conversion specified in the NCMRn mask registers is performed only once. At the end of each conversion, an EOC interrupt is issued if enabled by the corresponding mask fields in CIMRn and IMR).

BR, Petr