Hi,
The ENET0 interrupt vector addresses are a bit confusing. The user's manual (v7.1) says that the Group0 interrupt vector is at 0x1348, and Group1 is at 0x1370. Subsequent interrupts go up to 0x1380 and 0x1384 (which overlaps with RTC and API).
However, the actual behavior seems to be similar to that of ENET1: Group0..Group8 vectors are directly after each other.
I can see the same issue in the MPC5746 manual. It seems that vector_offset=0x1000+4*vector_number, except for some ENET0 interrupts.
Is this a documentation issue or I am missing something? Probably a silicon errata?
Hi,
the RM seems to be wrong here, correct offset should be
Below is vector table implementation within SDK, there is no reserved space between ENET vectors, as you wrote
BR, Petr
Hi,
the RM seems to be wrong here, correct offset should be
Below is vector table implementation within SDK, there is no reserved space between ENET vectors, as you wrote
BR, Petr
