MPC5746R eTPU to UART data transfer

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MPC5746R eTPU to UART data transfer

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ceciliac
Contributor III

Hi,

I want to periodically transfer data from the eTPU to UART via DMA, every 100us it should transfer 8 bytes.  I have tried the following approaches:

1) NBYTES = 1, CITER/BITER = 8. The problem here is that the DMARequest from the eTPU only triggers one iteration of the major loop so only one byte is sent.

2) NBYTES = 8, CITER/BITER = 1. With this test the data seems to be overwritten and not everything is sent. Which I'm guessing is because the Tx FIFO only has room for 4 bytes

3) NBYTES = 3, CITER/BITER = 1. This acutally works, all data is sent, but I really want to send 8 bytes....

Does anyone have any idea or example on how to make this work??

Thanks,

Cecilia

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6 Replies

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jamesmurray
Contributor V

I think you need to be using the UART TXFIFO empty to trigger the DMA action, once the eTPU has initiated the DMA transfer.

James

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ceciliac
Contributor III

Not sure which register to adjust to accomplish that, I have the following setting for UART and DMA:

// Baud rate = 2Mb/s
LINFlexD_0.LINIBRR.B.IBR = 3;
LINFlexD_0.LINFBRR.B.FBR = 1;
LINFlexD_0.UARTCR.B.UART = 1;
LINFlexD_0.UARTCR.B.RFBM = 1;
LINFlexD_0.UARTCR.B.TFBM = 1;
LINFlexD_0.UARTCR.B.OSR = 0;
LINFlexD_0.UARTCR.B.ROSE = 0;
LINFlexD_0.UARTCR.B.DTU_PCETX = 0;
LINFlexD_0.UARTCR.B.SBUR = 0;
LINFlexD_0.UARTCR.B.WL1 = 0;
LINFlexD_0.UARTCR.B.WL0 = 1;
LINFlexD_0.UARTCR.B.PCE = 0;
LINFlexD_0.UARTCR.B.TxEn = 1;
LINFlexD_0.DMATXE.R = 1;

__attribute__(( aligned(32) )) DMA_TCD_Struct etpu_rs485_tcd = {
(vuint32_t)(uint32_t *)((uint32_t)fs_etpu_data_ram_start + (eTPU->CHAN[70].CR.B.CPBA<<3) + _CPBA_ARRAY_Sensor_rs485Out_),
0x00, /*SMOD*/
0x00, /*SSIZE*/
0x00, /*DMOD*/
0x00, /*DSIZE*/
1, /*SOFF*/
1, /*NBYTES*/
-8, /*SLAST*/
((vuint32_t)&LINFlexD_0.BDRL.R) + 3, /*DADDR*/
0x00, /*CITERE_LINK*/
8, /*CITER*/
0, /*DOFF*/
0, /*DLAST_SGA*/
0x00, /*BITERE_LINK*/
8, /*BITER*/
0x00, /*BWC*/
0x00, /*MAJORLINKCH*/
0x00, /*DONE*/
0x00, /*ACTIVE*/
0x00, /*MAJORE_LINK*/
0x00, /*E_SG*/
0x00, /*D_REQ*/
0x00, /*INT_HALF*/
0x00, /*INT_MAJ*/
0x00 /*START*/
};

Thanks, Cecilia

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jamesmurray
Contributor V

Check the DMA MUX chapter and section 19.1.3

Linflex_0 TX is source 10 and can be used with DMA channels 0-15

or source 44  and can be used with DMA channels 32-63

I guess that currently you are using a source between 21 and 43 ?

I'm not using structs for my DMA configuration and don't have a 70th eTPU channel? So I don't quite follow that part of your code.

James

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ceciliac
Contributor III

The etpu B channels actually starts at eTPU->CHAN[64], so number 70 is eTPU_B_6 (not really clear in the manual..).

Your response got me thinking...since I am using a DMARequest from the eTPU that DMA channel is configured in the MUX as eTPU. So what I have done now is to create a channel linking between the etpu DMA channel to a DMA channel configured for LinFlex_0. Unfortunately it behaves exactly the same way, only 8 bits are sent per etpu request. Also the setting of LINFlexD_0.DMATXE.R does not seem to matter () which suggests there is something wrong with the configuration.

According to the manual "A DMA request is triggered by FIFO-not-full (TX) status signals." but it seems it is never triggered.

//Cecilia

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lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi,

just a quick hint - if you want to trigger transferring of 8 bytes on serial interface using one trigger from ETPU, you need to use two DMA channels. Configure one channel to send 8 bytes using trigger TXFIFO empty. This channel will be enabled by second channel - configure second channel (triggered by ETPU) to simply write to DMA_SERQ register to enable hardware trigger for first channel.

Regards,

Lukas

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ceciliac
Contributor III

I have channel linking between the etpu DMA channel and the one configured for UART. However only 1 byte is sent for every request, to send all 8 bytes I need to call the DMARequest from the eTPU 8 times. There must be some additional configuration required for enabling the TxFifo empty trigger !!??

Thanks, Cecilia

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