MPC5746C enter IVOR1_Handler interrupt, use the official demo, why?

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MPC5746C enter IVOR1_Handler interrupt, use the official demo, why?

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my_souls
Contributor III

MPC5746C enter IVOR1_Handler interrupt, use the official demo, why?

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petervlna
NXP TechSupport
NXP TechSupport

Hi,

Could you provide an issue closer description?

HW , SW used?

Any latched Faults in FCCU?

regards,

Peter

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my_souls
Contributor III

Hi,

    currently using IDE for ‘S32 Design Studio for Power Architecture Version: 2.1’, SDK for SDK PA RTM v3.0.0, using the Demo in the SDK, the program execution to the operation of CAN or PIT resources will jump to the IVOR1_Handler interrupt. I don't know the specific reason.

Get the demo version from the SDK, as shown below:

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petervlna
NXP TechSupport
NXP TechSupport

Hi,

Ok, now it is good to check the FCCU NCFSx register for any latched faults once you end in IVOR1.

To read FCCU NCFSx registers you have to execute reading operation.(refer to reference manual)

When you debug the program which instruction cause the jump to IVOR1?

regards,

Peter

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my_souls
Contributor III

Hi,

Thank you very much for your answer. I seem to have found the problem. Currently, there is no OSC32K external pin in the MCU of the MPC5746C 100MAPBGA, and MC_ME.DRUN_MC.SXOSCON is enabled in the Demo of the SDK, but it does not judge and wait for MC_ME.GS. The .B.S_MTRANS bit is set to 0, so the program jumps to the IVOR1_Handler interrupt when the PIT register is manipulated.
It seems that the officially provided Demo Code does not distinguish the 100MAPBGA of the MPC5746C from other Pin packages

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huaqingren
Contributor I

I also meet this question, and I want to know how to fix this bug? Thank you!

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