MPC5746C ADC CTU trigger external decode signal multiplexing delay

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MPC5746C ADC CTU trigger external decode signal multiplexing delay

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saurabh1
Contributor II

Hello,

 

I am using the CTU triggering (CTU trigger mode) to trigger the ADC sampling of externally multiplexed channels on ADC1 of MPC5746C.

But what I observe is that the ADC decode signal delay register value is not respected and the correct delay is not inserted, when the CTU triggers the conversion, whereas when I trigger through normal conversion (normal mode) in software, the correct decode signal delay is inserted when the external mux pins are switched.

I would like to understand if this is expected behavior. And if so, how can I provide an external signals decode delay (delay after the ADC sets the MUX pins to actually sampling the external channel) so that the application works as expected?

 

Thanks,

Saurabh

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5 Replies

894 Views
petervlna
NXP TechSupport
NXP TechSupport

Hello,

I have go the answer from our design, see it below:

The external decode signals(ADC1_MA[0], ADC1_MA[1], ADC1_MA[2]) are used to select one channel out of eight channels in external Analog multiplexers. As the channel switching of this external Analog multiplexers may cost some time, so the SOC provide the decode signals delay register (ADC_DSDR) to configure the delay between decode signal output and the actual start of conversion. If the ADC start the conversion once the decode signal output, it may get the incorrect result as the external Analog multiplexers has not completed the channel switch.

Both of all, this register is not used to control the delay between the switch of two external decode signals.

Best regards,

Peter

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

how does you observe that the decode signal delay register value is not respected?

See below feedback from application team:

In my view, this value can not be sensed by software as When a trigger is received, the channel number is taken as the channel value and the BCTU conversion starts

Best regards,

Peter

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945 Views
saurabh1
Contributor II

Hi @petervlna, I saw that the value is not respected by checking the ADC1MA0 pin on the oscilloscope. I have attached few waveforms in a screenshot here to explain the behavior:

  1. Waveform 1 shows the ADC1MA0 pin from 2 different triggering sources, the narrower burst of samples is the 1kHz BCTU triggered sampling (with an EMIOs timer) and the wider burst of samples is the 10Hz sampling triggered by software.
  2. Waveform 2 is further zoomed in on the highlighted area.
  3. Waveform 3 is even further zoomed in on the highlighted area in waveform 2 to show that the expected external mux delay for the software triggered sampling. It shows ~16us per toggle with the setting of 1000 in the decode delay register.
  4. Waveform 4 is further zoomed in on waveform 2 on the timer triggered burst of samples and shows the incorrect decode signal delay of ~2.5us.

After some debugging I observed that if I change the CTU mode from trigger mode to control mode, meaning that only CTU triggering is allowed on ADC1, then the decode signal delay is respected. Is it not possible to have a consistent decode signals delay in CTU trigger mode? I ask this because I need to configure some channels as software triggered and some as timer (BCTU) triggered on ADC1.

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

I did not find any information about this restriction, so I have contacted application team to clarify it.

No feedback until now.

Once I have something new, I will post it here.

Best regards,

Peter

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1,014 Views
petervlna
NXP TechSupport
NXP TechSupport

Hello,

hmm, I never cross that before. But it could be cause by HW trigger.

Let me check internally if there is any limitation.

Best regards,

Peter

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