MPC5746B trapping by IVOR1_Vector

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MPC5746B trapping by IVOR1_Vector

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karma_JC
Contributor I

Hi:

I need some help on IVOR1_Vector trap when I initiate DSPI interface by calling DSPI_MasterInit -> DSPI_Set_MCR_HALT. After that, it is trapped in IVOR1_Handler(Machine Check Interrupt). Would you know what is the cause of this issue?????

Thank you

James

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

Would you know what is the cause of this issue?????

Have a look at core reference manual to understand the root cause:

petervlna_0-1697527364753.png

petervlna_1-1697527382398.png

Best regards,

Peter

 

 

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karma_JC
Contributor I

Hi Peter:

 

Thanks for the advice.  I found chapter 63 of MPC5476 B/C/G RM contained the information regarding MCSR register.

I'm assuming from S32D Studio shall be able to view this register from debug mode.  However, I was not able to view this MSCR register under "register" list; I only saw MSR register.  Would you please provide some info on how to access MSCR register from debugger?

 

Thank you

James

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

I am not using S32DS interface for debug, but I found that you can view them via SPR registers:

petervlna_0-1697702681052.png

Best regards,

Peter

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742 Views
karma_JC
Contributor I

Hi Peter:

Thank you for the guide for finding the MCSR register under SPR.

 

The following is the snapshot of the MCSR related registers when the exception was taking place:

karma_JC_0-1698084330924.png

 

It seems to be the BUS_DRERR, G, LD and MAV has been triggered in MCSR register.  When I tried access CAN bus in MPC5746B.   Form the triggered bits in MCSR register, is the issue related the CAN bus being "guarded" or "lock"?????  Would you please confirm my logical on it?  If the case, is there anyway to release this "guarded" memory area?

Thank you

James

 

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731 Views
petervlna
NXP TechSupport
NXP TechSupport

Hello,

Have  a look at MCAR for address where the failure happen.

petervlna_0-1698131317220.png

Best regards,

Peter

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