MPC5744P C55 flash memory erase brownout - bit depletion?

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MPC5744P C55 flash memory erase brownout - bit depletion?

745 Views
chosp
Contributor III

Hello

MPC5744P here, 1N15P. We have found out that if during flash memory erase there is a power loss, there is the possibility that the entire memory section to be deleted becomes entirely corrupt.

This results in that when reading, an IVOR1 exception is generated. Reading the region using TRACE32 results in "????" symbols all over the section.

In another thread we read that this was a "bit depletion" error resulting from brownout during erase, but this applied to C90 memory.

- Is there any way to detect this condition, other than going through a IVOR1 exception and finding the reason that caused it?

- Which is the procedure to "revive" the section?

Thank you

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3 Replies

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

but we were looking for a complete ECC check of the memory to address this issue before entering into operation.

Then you are looking for AI test. Please refer to reference manual.

2.20.3 Array integrity self check
The Array Integrity (AI) operation is a flash-specific self-test feature in which a MISR
signature value is generated from data read from selected flash blocks. After the
operation is complete, customer code compares the resulting MISR signature to the
expected value to determine if an incorrect read or ECC detection occurred.

Best regards,

Peter

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

We have found out that if during flash memory erase there is a power loss, there is the possibility that the entire memory section to be deleted becomes entirely corrupt.

This is correct. When you have power loss during programming/erase cycle, then the block will became corrupt as the memory implements ECC.

So, your data wont match ECC syndrome. Therefore you will see ??? in debugger or any symbol which represents inconsistent memory content.

Simply you will get ECC fault as soon as you access this memory. You can see it from FCCU module NCFS registers.

To recover from this state correct erase cycle is needed.

Furthermore voltage drop will be logged in low voltage detectors and you can set reaction on such events via PMC or/and via FCCU.

Best regards,

Peter

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730 Views
chosp
Contributor III

Hello

When we access a ECC-incorrect region, it enters IVOR1. We would be able to determine the faulty address by checking registers, but we were looking for a complete ECC check of the memory to address this issue before entering into operation.

 

 

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