MPC5744P ADC Self test fails

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MPC5744P ADC Self test fails

94 Views
simmering
Contributor I

Greetings,

We have trouble with the ADC self test for the MPC5744P CPU.

The test fails at step 11 or 12 of the capacitive test algorithm.

The ADC is used in the following way:

  • The ADC is configured for single shot mode
  • The ADC clock is set to 40MHz, with PLL0 as reference. MCR.ADCLKSEL=1
  • The test steps are progressed manually by incrementing ADC_STCR3.
  • MSTEP ADC interrupts are enabled and the interrupt handler increments the test step and triggers a new conversion by setting ADC_MCR.NSTART
  • ADC test watchdogs are enabled, but the timers are not. ADC_STAW0R.AWDE=1, ADC_STAW0R.WDTE=0 and similarly for the other STAWx registers The ADC watchdog thresholds are loaded from UTEST

According to the reference manual, bit ERR_C of the ADC_STSR1 register is set when an algorithmC self test step fails, but this does not always happen for us. The configured FCCU reaction often triggers without the ERR_C bit being set. However, STEP_C of the ADC_STSR1 is always updated.

So if the FCCU reaction is caught with a break point, STEP_C is always 0xA or 0xB, but ERR_C is most often 0 (sometimes it's 1).

An observation that might be relevant is that the ADC calibration does not always succeed. ADC_MCR.CALIBRTD is not always asserted after the calibration steps have been performed. If the calibration is attempted again it usually succeeds, but sometimes it needs 3 attempts.

We require assistance in sorting out why the ADC self test fails. Do you have any suggestions for what to investigate?

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4 Replies

67 Views
davidtosenovjan
NXP TechSupport
NXP TechSupport

Hi,

tell me something about the environment when the issue happen. Whether the fail happen on some production board in the field. Or prototype board during product development? Or even our EVB? In laboratory conditions or in the field? One piece or multiple? Any other dependency (temperature and so, ..)?

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55 Views
simmering
Contributor I

Hi,

we are now using a prototype PCB. The ADC self test and calibration was developed on this.

It is still in an office environment.

Is the ADC self test and calibration extremely sensitive to PCB design and external environment ?

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40 Views
davidtosenovjan
NXP TechSupport
NXP TechSupport

On the page 3 you may see note s about noisy environment:

https://www.nxp.com/docs/en/application-note/AN5015.pdf


All algorithms (RC, C and S) uses reference voltages to performs particular self-test. If there is an issue to pass self-test because of increased noise in voltage references (application specific), user can extend boundaries allowing to pass the self-test (again it is application specific as very precise voltage reference may not be required by user).

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13 Views
simmering
Contributor I

Hi

We've tried relaxing the limits, but in order to make the tests pass consistently, the limits must be relaxed far outside of the recommendation in the application note you linked.

  - With the limits at +-256, the tests fail fairly often

  - With the limits at +- 512, the tests seem to pass all the time

But it doesn't seem right that the limits must be relaxed this much. Are the tests still of any use with these limits?

We're planning on testing our code on a development board as well, but haven't set that up yet.

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