MPC5744, can't inject a SRAM correctable ECC error

[Jamber_H]

Hi,

I want inject a SRAM correctable ECC error by config the dcr E2EECSR0. I can set the E2EECSR0, but can't generate a SR_CE in MEMU, what's the reason about it? Does it have relation with aligment or link command file?

 Best regards

Jamber

[petervlna]

Hello,

The fault will be reported in SR_CE as manual express.

My problem is I can set the dcr E2EECSR0 to 0x1001, but MEMU can't detect a SR_CE.

Set the example accordingly and run it:

I was just talking to the demo code author and there is not known issue with it.

The fault is also reported in FCCU NCFSx register.

Best regards,

Peter

[petervlna]

Hello,

I am quite confused here.

It looks like you are talking bout 2 different things.

1.ECC single bit error in RAM

2. E2E ECC protection

So which one you want to inject? ECC on RAM array?

Best regards,

Peter

[Jamber_H]

Hi Peter,

What I want to do is shown in this figure. Is there some misunderstand about SR_CE injection and detection with me?

 Best Regards

Jamber

[Jamber_H]

Hi Peter,

By setting the dcr E2EECSR0 to 0x1001, it can generate a single ECC error for next CPU external write access, and it will be detected by MEMU for the next CPU read access.

My problem is I can set the dcr E2EECSR0 to 0x1001, but MEMU can't detect a SR_CE.

My code references the excemple:

https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/Example-MPC5744P-1b-2b-RAM-ECC-error-injection-G...