MPC5643L INTC sw handlers

[Pat]

Hi,

Is there a complete intc sw handlers file for IVOR0-15 and IVOR32-34 available for MPC5643L, not only IVOR4 ?

Best regards,

Pat

[petervlna]

Hi,

We do not have such file. In 99.9% cases this is handled by OS.

For our example purpose its enough to have IVOR0,1,4 handlers.

regards,

Peter

[Pat]

Hi petervlna‌, and all,

Don’t hesitate to correct, change or anything else to improve the intc SW IVORx prolog and epilog handlers of the attached file above. 

It’s a mixed source from S32DS and the example Example MPC5643L eTimer DMA GHS614.

[Pat]

Hi petervlna‌,

I have defined a -wx(read not allowed) region for CoreZ4d/Nexus master with MPU module in order to create an IVOR1 exception when the core read data in this region. 

The IVOR1 occurs as expected, then I clear the MCSR register with the following code :

void IVOR1_Exception_Handler(void){
    uint32_t mcsr = __MFSPR(572);
    __MTSPR(572, mcsr);
    /* Enables region 2 to grant Core Z4D_0 read permission */
    (void)SMPU_DRV_EnableRegion(SMPU_0, 2U, true);
}

Please have a look on attached intc_sw_handlers file and let me know your changes or comments.

Best regards,

Pat