MPC5602D Data flash issue

[drrode]

Hi,

I am using on-chip data flash (first 16kB sector) to store some NV data.

I observed, some times flash data is getting corrupted automatically and processor control is not coming out of ReadMemory function (It goes in some infinite loop). I tried to debug the code, I observed that in data corrupt situation, some memory location shows data '????????' and some location shows 'FFFFFFFF' data as shown in attached file. I would like to know when memory location shown '????????' data? What is the reason for this and how to avoid this?

In data corrupt situation, I tried to erase the sector uing flash programming tool and it starts working correctly (I could able to read and write data again)

Please let me know all details related to this issue and solution to avoid this.

Thanks and Regards,

Dinesh Rode

[drrode]

Hi Lukas,

Finally I could able to catch IVOR2 Handler using SPC5Studio. Thanks a lot for your help.

On same note I would like to know some more details.

1> Do I also need to Handle IVOR1 and IVOR3 exceptions for DFLASH operation?

2> What are the causes of SRAM Non-correctable error reporting. So far we have not faced this issue but is it advisable to handle this?

     We are using this controller in Automotive application.  

[lukaszadrapa]

1. If you do not execute the code from DFLASH then IVOR3 will not be triggered when reading corrupted data from DFLASH (but may be triggered if code flash memory is corrupted...). As you can read in AN5200, double bit ECC error can trigger either IVOR1 or IVOR2 depending on the state of MSR[EE] bit, so you should handle both of them.

2. There are two basic situations when you can see double bit ECC error in SRAM - after reset, the SRAM must be initialized because it contains random data and ECC syndromes are not valid. So, there's a lot of ECC errors. Second:

Single event upset - Wikipedia 

Regards,

Lukas

[drrode]

Is it possible to generate ECSM IRQ - 9 or ECC_DBD_PlatformFlash IRQ - 35 along with IVOR2/3?

I know how to catch IRQ using SPC5Studio.

[lukaszadrapa]

Yes, you can enable additional reporting in ECSM module but the exception will be triggered anyway. You have to find out if it is already implemented in your project (if there are some empty exception handlers, at least) or you have to write it. You can check this application note which includes SW examples to have some clue:

http://www.nxp.com/files/32bit/doc/app_note/AN2865.pdf

http://www.nxp.com/webapp/sps/download/license.jsp?colCode=AN2865SW

See the example INTC-SWvector-VLE for MPC560xB.

Lukas

[drrode]

Do you have any example created using SPC5Studio?

I understand what you are saying. The problem I am facing is to catch IVOR2/3 exception.

I am working on old project created using SPC5Studio wizards and I need to implement ECC handling.

I do not see any provision to enable IVOR2_Handler function in which I can write my code.

[lukaszadrapa]

Sorry, I have never used SPC5Studio.

[drrode]

Is there any c code to configure and monitor DFlash ECC double bit detection and correction?

I am using MPC5601D controller and SPC5Studio tool-chain.

I have checked zipped folder you sent (05 examples). It is not similar to SPC5601D. 

[lukaszadrapa]

Hi,

you do not need to configure it. The double bit ECC error can't be masked - it is active all the time. Only single bit ECC error is automatically corrected - this is also done automatically, you can't disable this feature. If double bit ECC occurs then exception is triggered (you can't disable it). Double bit ECC error is not corrected - there's no enough information to restore the value. So, you are notified by exception that the program flow cannot continue because it is not possible to read a data or fetch an instruction.

I do have a couple of other test projects but all of them are almost the same as you can find in AN5200.

Regards,

Lukas

[drrode]

Hi Lukas,

I have one more observation related to memory corruption. My Device operates until 5.3V where it switches off. The typical operating range is 8V to 16V. I have generated varying voltage input 14V for 1 sec and 8V for next 500ms. The cycle is repeated continuously while on-chip DFlash operation is going on. I have observed that for given voltage signal the Device is not getting reset or turning off but still memory data is getting corrupted. Do you have any idea about this operation.

Thanks and Regards,

Dinesh Rode

[lukaszadrapa]

Hi,

I can see these reasons:

- the device is reset due to low voltage (it can be cause by spike if the noise is not filtered enough during voltage variation)

- too many erase/program cycles has been performed on the flash

- some kind of issue when the device gets reset due to erroneous code (watchdog or wharever)

- how do you stop the continuous flash programming? If you terminated it by reset (attaching a debugger using reset) or by power-down then it will probably corrupt the flash too...

Regards,

Lukas

[drrode]

Hi Lukas,

Thanks for all details.

All projects are created using CodeWarrior. I am using SPC5Studio. Anyways... will open files in text editor and try to understand. 

You mentioned that if flash operation is terminated by unexpected reset/power down, the flash is left in undeterministic state. Would like to know flash operations means only Erase and Write operation or Read operation can also create issue? Apart from reset/power down, is there any other reason for flash corruption? We are using this controller in Automotive domain.

Is there any reference document to create flash driver with ECC code using Wizard?

Thanks and Regards,

Dinesh

[lukaszadrapa]

Hi Dinesh,

read operation cannot cause such problem. That's related only to modify operations.

ECC error can be caused by:

- as already mentioned - by unexpected reset during modify operation

- overprogramming - when you program word or doubleword (depends on device and type of memory) which is not fully erased. In case of data flash on MPC5602D, the ECC is handled on 32bit boundary, so a word which is going to be programmed must be fully erased. In case of code flash, ECC is handled on 64bit boundary, so you can program only fully erased doubleword.

- flash wear-out. If the flash has been programmed/erased too many times or if the flash has been programmed a lot of years ago (see the spec in datasheet) then incorrect data may occur.

The AN5200 should provide enough information. You don't need "driver with ECC code". The ECC is enabled and running all the time and it is handled on background without user intervention. All you need to do is to handle the exceptions as described in the application note. 

By the way, you can download Standard Software Driver for flash and Emulation EEPROM driver:

http://www.nxp.com/files/run_time_software/device_driver/MPC5xxx_EEE_DRIVER.exe

http://www.nxp.com/files/soft_dev_tools/software/device_drivers/MPC56XX_C90LC_JDP_SSD_100_DEVD.exe

Regards,

Lukas

[drrode]

Hi Lukas,

Thanks a lot for your reply.

I have gone through all details you mentioned.

I think I need to handle double bit ECC correction in firmware. I have generated flash driver code using Wizard. Is there any sample C code to implement / integrate 2-bit ECC algorithm?

Warm Regards,

Dinesh Rode

[lukaszadrapa]

There's also zip file associated with AN5200, I forgot to share the link:

http://www.nxp.com/files/microcontrollers/doc/app_note/AN5200SW.zip 

You can find SW examples in the package. There's no example directly for MPC5602D but the principle is still the same.

Regards,

Lukas

[lukaszadrapa]

Hi,

if flash operation is terminated by unexpected reset/power down, the flash is left in undeterministic state. It usually results in double bit ECC errors, so the access will result in bus error and exception. The solution is to erase whole flash block again.

For more details, read please this application note:

http://www.nxp.com/files/microcontrollers/doc/app_note/AN5200.pdf

Regards,

Lukas