MPC5554 EQADC Calibration problem

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MPC5554 EQADC Calibration problem

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damienwalker
Contributor I

We are having a problem with the EQADC calibration routine.

 

This uses internally generated 25% and 75% (of VRH-VRL) levels and we are seeing different results between two applications.

 

In one application, the routine works fine and produces expected values (ie approx. 4K and 12K respectively). However, despite sharing the same software, a second application produces nonsense results (approx. 9K and 10K respectively).

 

As the 25%/75% levels are generated internally to the uC and the results are not in this ratio, this suggests a  problem with the silicon.

 

We are aware of e1741 errata note about the 25% level requiring a min of 64 samples and have implemented this.

 

Is there any known silicon problem that might affect this please or is there any other advice as to what might be causing the problem?

 

Device topside markings are as follows:

In the working application:

MPC5554MVR132

QU30740

MHLOQ

 

In the non-working application:

MPC5554MZP132

OPX1252

XTKZQ

 

Is there a die revision between these two parts for example? Obviously will a BGA package, we cannot easily swap processors!

 

Many thanks for your help.

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damienwalker
Contributor I

Thanks David, all thoughts are appreciated!

I have already raised a help ticket in fact, so it will be interesting to see what comes of that, I just thought I would ask the community in case someone else had had a similar experience.

I know the only apparent different in the two uCs is in the solder finish, but as the problem appears to be internal, it could be caused by a Silicon Revision difference. The associated external circuitry is very simple.

Best regards

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Angelo343
Contributor I

Hi damienwalker,

Did you then understand the origins of this problem? I am in a similar condition.

thank you
Angelo

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davidtosenovjan
NXP TechSupport
NXP TechSupport

MPC5554MVR132 is Pb-free device, MPC5554MZP132 is not. That’s the only difference.

Thus I would probably try to find out if there is any difference in surrounding circuit in your applications.

I would recommend to create a new case as it is seems to me better to solve it out of community space. Here you can see procedure:

How to submit a new question for NXP Support

Thanks for understanding

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