MAX TX/RX buffer/fifo for CAN

[yalamandadosaky]

Hi PetrS, I have one more doubt , In MPC5777M MCAN Message RAM.As the message ram is shared among all the nodes,how many Maxium Std/extended id filters and Tx Buffers/RxFIFOs I can configured for each node(M_CAN_1,2,3,4).

As there are 128std id ,64extended id filter elements and 32 tx buffers ,64 rxfifo -0 and 64 rxfifo -1 available in Message RAM. I am thinking to share the all elements among all nodes. i.e out of 128 std id 32 for can-1 ,32 for 32-can2 32-for 32 for can3 and remaining 32 for can4. and same configuration for tx/rx elemments

Is it like that or I can configure total elements for each node. Can you please rectify my doubt.

[PetrS]

Hi,

It is totally up to user how the shared RAM will be organized, you just need to fit to RAM size.

The offset address of TX/RX buffers and RX FIFOs should be unique for each modules.

The ID filter elements list you mentioned can be used as in each MCAN module you define number of filter elements and filter list start address using the SIDFC register.

BR, Petr

[yalamandadosaky]

Hi PetrS Thank you for your reply.

So as per your above comment. 

I would like to configure two nodes below

M_CAN_1

SIDFC -128 elements with offset address 0x0000;

XIDFC -64 elements with offset address 0x0200;

RXFIFO-0 -> 64 elements with offset address 0x0400 to 0x0800
RXFIFO(1)->64 elements with offset address 0x0800 to 0x0C00

TXBUFFER->32 elements with offset address 0x0C00 to 0x0E00

M_CAN_2

SIDFC -128 elements with offset address 0x0F00 to 0x1100

XIDFC -> 64elements with offset address 0x1100 to 0x1300

RXFIFO-0 -> 64 elements with offset address 0x1300 to 0x1700
RXFIFO(1)->64 elements with offset address 0x1700 to 0x1B00

TXBUFFER->32 elements with offset address 0x1B00 to 1D00

Is this is correct ? if wrong can you please correct me.

[PetrS]

Yes, the configuration is correct, assuming 8-byte data field is used for TX/RX buffers and RXFIFOs.

BR, Petr

[yalamandadosaky]

Thank you Petr Stancik