Latency/No of clock cycles of each Instructions

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Latency/No of clock cycles of each Instructions

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sagardhavali
Contributor III

Hi,

I am looking for latency or number of clock cycles that each instructions takes in MPC5744P.

Any help is appreciated.

Thank You,

Sagar

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davidtosenovjan
NXP TechSupport
NXP TechSupport

Hi, you may find in RM, table above:

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Precondition for such timing is that executed code is stored in instruction cache and access only data already loaded in data cache (configured for copy-back mode).

Otherwise you must take into account other delays (stalls) caused by access to registers/memories over XBAR (and possibly PBRIDGE/EBI).