LD File Configuration for Core 1 in GHS Compiler for MPC5777C

[Santhoshraj]

Hi [Community/Support],

I’m working on a project for the MPC5777C microcontroller using the Green Hills Software (GHS) compiler. I need to configure the linker script (LD file) for Core 1, but I'm not sure how to structure the memory sections, stack, and interrupt vector table for dual-core operation.

Could you please provide a sample LD file configuration for Core 1 or point me to the appropriate documentation for setting up core-specific memory areas, interrupt handling, and other core-specific parameters?

Thank you!

[davidtosenovjan]

We have only single elf base project which can download here:

https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/Example-MPC5777C-PinToggleStationery-GHS714/ta-p...

Or you may use S32DS project generated by project wizard and see linker files as reference for you GHS setup.

However I would rather recommend to contact GHS support, they should best know how to create a dual elf configuration under their environment:

https://support.ghs.com/