I cannot find out MAC57D54 PLL power supply in datasheet and RM , would you please supply reference document?

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I cannot find out MAC57D54 PLL power supply in datasheet and RM , would you please supply reference document?

531 Views
jacky_Tan
NXP Employee
NXP Employee

MAC57D54_clock.pngwhich power pin is provioded power supply for this clock sysytem?

3 Replies

397 Views
martin_kovar
NXP Employee
NXP Employee

Hello Jacky,

please check the table below:

pastedImage_1.png

Regards,

Martin

397 Views
jacky_Tan
NXP Employee
NXP Employee

Hi Martin,

Thanks you answer my question.

Desay need know which pins supply SAC57D53HCVMO(516 MAPBGA package)PLL Power and Ground pin.

Would you help me point out the power supply pins for PLL power and Ground as below ?

516BGA Ballmap

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

PK[7]

PK[4]

PK[1]

PJ[15]

PJ[13]

PJ[11]

PJ[10]

PJ[8]

PJ[6]

PJ[5]

PJ[3]

PJ[1]

PJ[0]

DDR_DQ21

DDR_DQ16

DDR_DQS2

DDR_DQ20

DDR_DQ17

DDR_DQM2

VDDE_A

PH[8]

PH[3]

VDDE_A

PM[12]

PK[9]

VSS

PK[5]

PK[2]

VSS

PJ[14]

PJ[12]

VSS

PJ[9]

PJ[7]

VSS

PJ[4]

PJ[2]

VSS

DDR_DQ18

DDR_DQ23

VSS

DDR_DQ19

DDR_DQ22

VSS

PH[9]

PH[5]

VSS

PR[0]

VSS

VDDE_A

PK[10]

PK[8]

PK[6]

PK[3]

PK[0]

DDR_A10

DDR_BA2

DDR_CKE

DDR_CLK

DDR_A5

DDR_A15

DDR_A13

DDR_A6

DDR_CAS

DDR_RAS

DDR_DQ26

DDR_DQ31

DDR_DQ28

DDR_DQ25

DDR_DQM3

PH[7]

PH[6]

PH[2]

PM[11]

PR[1]

PM[10]

DDR_DQM0

DDR_A14

DDR_A12

DDR_A9

DDR_A7

DDR_A1

DDR_BA0

DDR_WE

DDR_CLKB

DDR_A2

DDR_A11

DDR_A8

DDR_A4

DDR_CS

DDR_DQ29

DDR_DQ24

DDR_DQS3

DDR_DQ27

DDR_DQ30

PH[10]

PH[4]

PH[1]

PG[13]

PG[12]

PG[11]

PS[2]

DDR_DQ4

VSS

DDR_DQ12

DDR_DQM1

VSS

DDR_A3

VDDE_SDR

VSS

DDR_BA1

VDDE_SDR

VSS

VDDE_SDR

DDR_A0

VSS

DDR_ODT

VSS

VDDE_SDR

PH[12]

VSS

PH[11]

PH[0]

VSS

PS[1]

PG[10]

VSS

VDDE_A

DDR_DQ1

DDR_DQ3

DDR_DQ9

DDR_DQ11

VDDE_SDR

VDDE_DDR

VDDE_DDR

VDDE_DDR

DDR_VREF

VDDE_DDR

VDDE_DDR

VDDE_DDR

VDDE_DDR

VDDE_A

VDDE_A

PS[0]

PG[9]

PS[3]

PG[7]

PS[4]

DDR_DQS0

DDR_DQ6

DDR_DQS1

DDR_DQ14

VDDE_DDR

PG[8]

PS[5]

PG[6]

PG[5]

PS[6]

DDR_DQ2

VSS

DDR_DQ8

DDR_DQ10

VSS

VDDE_DDR

VDDE_A

VSS

PG[3]

PG[4]

VSS

VDDE_A

DDR_DQ7

DDR_DQ0

DDR_DQ13

DDR_DQ15

VDDE_DDR

PG[2]

PG[1]

PG[0]

PS[7]

PS[13]

DDR_DQ5

PK[13]

PK[12]

PK[11]

VDDE_SDR

VDDE_DDR

VSS

VSS

VDD_LV

VSS

VSS

VDD_LV

VSS

VSS

PS[12]

PS[11]

PS[10]

PS[9]

PS[8]

PR[9]

PL[0]

VSS

PK[15]

PK[14]

VSS

VDDE_DDR

VSS

VDD_LV

VSS

VDD_LV

VDD_LV

VSS

VDD_LV

VSS

VDDE_A

VSS

PR[8]

PR[7]

VSS

VDDE_A

PL[4]

PL[3]

PL[2]

PL[1]

VDDE_SDR

VDD_LV

VSS

VSS

VSS

VSS

VSS

VSS

VDD_LV

PR[6]

PR[5]

PR[4]

PR[3]

PR[2]

PL[7]

PL[8]

PL[9]

PQ[0]

PL[5]

PL[6]

VSS

VDD_LV

VSS

VSS

VSS

VSS

VDD_LV

VSS

PM[13]

PM[14]

JTAG_TCK

TRACE13

TRACE14

TRACE15

VDDE_B

VSS

PL[10]

PQ[1]

VSS

VDDE_B

VSS

VDD_LV

VSS

VSS

VSS

VSS

VDD_LV

VSS

VDDE_A

VSS

TRACE12

JTAG_TMS

VSS

VDDE_A

PL[11]

PQ[2]

PL[12]

PQ[3]

PL[13]

VDD_LV

VSS

VSS

VSS

VSS

VSS

VSS

VDD_LV

TRACECLK

TRACE8

TRACE9

TRACE10

TRACE11

PQ[4]

PQ[5]

PL[14]

PQ[6]

PQ[7]

PQ[8]

VSS

VDD_LV

VSS

VDD_LV

VDD_LV

VSS

VDD_LV

VSS

VDDE_A

TRACE4

TRACE5

TRACE6

TRACE7

VPP_TEST

VDDE_B

VSS

PQ[9]

PQ[10]

VSS

VDDE_B

VSS

VSS

VDD_LV

VSS

VSS

VDD_LV

VSS

VSS

VDDE_A

VSS

RESET

EXTAL

VSS

XTAL

PQ[11]

PQ[12]

PQ[13]

PA[0]

PA[2]

VDD_LP_DEC

VRC_CTRL

PORST

EXTAL32

XTAL32

PQ[14]

PA[1]

PA[3]

PA[4]

PP[10]

VDDE_B

VSS

TRACE3

TRACE2

TRACE1

VSS

TRACE0

PP[11]

VSS

PA[5]

PA[6]

VSS

VDDEH_ADC

PF[0]

PF[1]

PF[2]

TRACECTL

VDDE_B

PP[12]

PP[13]

PP[8]

VDDE_B

VDDE_B

VDDE_B

PN[13]

PN[15]

PM[4]

PM[9]

PC[15]

PC[14]

VDDM_SMD

VSSEH_ADC

PE[11]

PE[12]

PE[13]

PE[14]

PE[15]

PA[7]

PA[8]

PN[0]

PN[1]

VSS

VDDE_B

PN[7]

VSS

VDDE_B

PN[14]

VSS

PP[3]

PM[5]

VSS

OLDI_P1

OLDI_N1

VSS

VDDM_SMD

PC[5]

VSS

PD[7]

PF[3]

PE[9]

VDDA

VSSA

PE[10]

VSS

VSS

PN[2]

PN[3]

PB[1]

PB[3]

PB[5]

VSS

PN[11]

PB[9]

PP[0]

PP[5]

PM[3]

PM[8]

OLDI_N0

OLDI_P2

PC[12]

PC[11]

PC[4]

PC[2]

PD[6]

PD[1]

PF[4]

PE[7]

PE[5]

PE[8]

PA[9]

PA[10]

PA[11]

PA[12]

PB[2]

PB[4]

PB[6]

PN[10]

PN[12]

PB[10]

PP[2]

PP[4]

PM[2]

PM[7]

OLDI_P0

OLDI_N2

PC[13]

PC[10]

PC[7]

PC[3]

PD[4]

PD[0]

PF[5]

PE[3]

VDDA_REF

PE[4]

VDDE_B

VSS

PA[13]

PA[14]

VSS

PN[5]

PN[8]

VSS

PB[7]

PB[11]

VSS

PP[6]

PM[1]

VSS

OLDI_CLKN

OLDI_P3

VSS

PC[9]

PC[6]

VSS

PD[5]

PD[3]

PF[6]

PE[2]

VSSA_REF

PE[6]

PA[15]

PB[0]

PN[4]

VDDE_B

PN[6]

PN[9]

VDDE_B

PB[8]

PB[12]

PP[1]

PP[7]

PM[0]

PM[6]

OLDI_CLKP

OLDI_N3

VDDE_B

PC[8]

PC[1]

PC[0]

VDDM_SMD

PD[2]

PF[7]

PE[0]

PE[1]

Regards,

Jacky

0 Kudos

397 Views
martin_kovar
NXP Employee
NXP Employee

Hello,

please see the figure below. It shows, which pins supply which power domain.

pastedImage_1.png

pastedImage_2.png

pastedImage_3.png

pastedImage_4.png

These pins above are the ones. All these pins must be connected and it is not possible to tell, which pins supply which module. It works like one complex thing. 

Hope it helps.

Regards,

Martin