How to implement can task in 5748G Z4_1 core?

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How to implement can task in 5748G Z4_1 core?

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Contributor II


     I implement can task in Z4_1 core.Can task is the only task in Z4_1 core which just receive can message and send can message over CAN1~8.when received can message,then save the message in the ram fifo buff.

    Now the problem is that the eight can port receiving can message together will lost some can message when the bus load of every can port is 100%.

   If the bus load of every can port is 35%, there'll be no can message lost in the reception of can task.The Frequency of Z4_1 core is 120MHz.

   Could somebody give me some suggestion ?  Thanks.

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NXP TechSupport
NXP TechSupport


seems you simply do not read RX MBs fast enough and you lost a message. You did not specify what SW do you use, so hard to say. Also you did not say what messages you have on the bus, what is a baudrate, etc.

If I assume shortest message on the bus with std ID and 1 byte payload, with 1Mbps the message takes 55us. With 3 bits intermission frame you can have message each 58us. Assuming 8 CAN buses you have 58/8 = 7.25us to read the MB. 

Is this achievable with your application?

BR, Petr 

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