How to handle Instruction TLB Exception on MPC5777C using AdaMulti?

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How to handle Instruction TLB Exception on MPC5777C using AdaMulti?

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Santhoshraj
Contributor I

Hi,

I'm working with the MPC5777C processor and using the AdaMulti toolchain for development. I'm encountering an Instruction TLB Exception, and I'm trying to understand the correct way to handle it.

Can you please help me out to solve the above concern.

Thank you

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

This is linked to MMU settings.

Which exact TLB exception you are getting? Which IVOR?

Best regards,

Peter

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Santhoshraj
Contributor I

Hi sir,

Triggering instruction TLB error interrupt (IVOR14) 

1000045757.jpg

Thank you!

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

A Translation Lookaside Buffer (TLB) miss in instruction translation means the processor can't find the page table entry (PTE) for the current instruction's virtual address within the TLB.

petervlna_0-1744352537116.png

For the details please refer to the core reference manual of e200z7 chapter : 10.6 TLB operations

https://www.nxp.com/webapp/Download?colCode=E200Z759N3CRM&location=null

Best regards,

Peter

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