How to detect I2C arbitration loss on S32R274

[dj_hacker]

The reference manual for the S32R274 says that it supports multi-master I2C. However, it does not mention I2C arbitration loss. There does not appear to be any support for detecting arbitration loss in the status register (I2C_IBSR). It is possible that after the master checks that the IBB bit in I2C_IBSR is clear (i.e. the bus is idle), another master will begin a transaction, and either master could corrupt the other's transfer. How is bus arbitration loss detected on this part?

[lukaszadrapa · Accepted solution]

Hi Dougles,

I can see that I2C module on this device does not support multi-master. The configuration of this I2C module is "Single controller" as described in I2C spec. That means arbitration and synchronization is not needed.

The bad part is that it is not mentioned in the reference manual. I will suggest to add some note to avoid confusion. Thanks for pointing this out.

Regards,

Lukas