How many banks does the MPC5777C SRAM has?

[MatheusFranklin]

Hello!

I am trying to know how many memory banks does the MPC5777C SRAM has, but i did not find any clear information about that in the reference manual or the datasheet. The only information I found is this one, which leads me to conclude that the SRAM has three memory banks, but i am not sure about that.

Could anyone help me with this, please?

Best regards, 

Matheus.

[petervlna]

Hello,

I am not sure what you mean by "banks". But this device has 3 RAM ports.

each module one.

But I do not understand the point here as only initialize ECC on RAM and that's all.

Best regards,

Peter

[MatheusFranklin]

Hello!

You said here that "this device has 3 RAM ports. Each module one."

What did you mean by "ports"? Were you referring to the PRAMC_0, PRAMC_1 and EBI's external SRAM slave ports connected to the XBAR?

I suppose that by "module", you were referring to the SRAM module. Since the MPC5777C has two SRAM modules, how can each module have one port and the total number of ports be 3? I suppose it was just a typo, but the chance of me not knowing something useful makes me question this : )

Best regards,
Matheus

[MatheusFranklin]

I am working with a multicore processor in a hard real-time system, so a way of mitigating the timing interference caused by the competition of the sram is called bank coloring. In this strategy I need to allocate each core to run on different memory banks. Banks are internal components of the RAM architechture that are composed by a group of memory cells. Memory cells from different banks can be accessed in parallel, atenuating access serialization interference.

I know that the MPC5777C has two memory controllers (PRAMC_0 and PRAMC_1), each one connected to different halves of the 512k SRAM. I need to know if the 512k SRAM have any internal subdivisions, like different banks, or different SRAM modules (e.g., two 256k SRAM independent modules, each one for one ram controller). Furthermore, is there any PRAMC reference manual of any kind of more detailed documentation?

[petervlna · Accepted solution]

Hello,

I know that the MPC5777C has two memory controllers (PRAMC_0 and PRAMC_1), each one connected to different halves of the 512k SRAM.

yes, there are 2 of them. Each one occupying one slave port on XBAR.

I need to know if the 512k SRAM have any internal subdivisions, like different banks, or different SRAM modules (e.g., two 256k SRAM independent modules, each one for one ram controller).

There are two SRAM array modules and 2 PRAM controllers. Each controller has its own XBAR slave port.

Furthermore, is there any PRAMC reference manual of any kind of more detailed documentation?

No, only information which is present in reference manual.

Best regards.

Peter

[MatheusFranklin]

Hello!

One topic that is not clear for me is how the SRAM module of the first half of the 512k is "partially standby"? Are there one SRAM module of 64k and other of 196k to compose the 256k or is there a single 256k SRAM module with standby properties in its first 64k?

[petervlna]

Hello,

Looking at the reference manual:

There are 2 RAM arrays :

1. Standby

2. SRAM

Both of them are on port 2. Standby is in the first part of the addresses.

Are there one SRAM module of 64k and other of 196k to compose the 256k or is there a single 256k SRAM module

From user perspective it really doesn't matter. Such info is not available.

But I expect that there are 2 separate power domains, one for standby is always active.

So the large portion of RAM can be switch off in low power mode.

Best regards,

Peter