FlexRay WakeUp status : COLLISION_UNKNOWN

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FlexRay WakeUp status : COLLISION_UNKNOWN

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Contributor IV

Hi,

I am using DEVKIT MPC5748G Board for FlexRay driver development.

When Communication controller (CC) is in READY state then I am sending Wakeup command but wakeup status is always is COLLISION_UNKNOWN. Also I have not seen output signals on the BP and BM pins of Transceiver (TJA1081B). I am using only one development board and checking wakeup patterns on the oscilloscope. So there is no reception of wake up from other node.

 

I referred Table 9 in the data sheet of TJA1081B (Table 9 refer IMAGE 3 in attachment) and there it is mentioned TXEN will be enabled when signal on the BGE = HIGH, TXEN = LOW, TXD = HIGH. But here signal on the TXEN always remains high.

 

I observed HIGH signal across registers R61, R62, R63 mounted on the development board. These are ports pins used for FR_A_TX, FR_A_TX_EN, FR_A_RX (Refer attached IMAGE 1)

 

Need your inputs to come out from this COLLISION_UNKNOWN state. 

 

Below is the port pin configuration.

 

Wake Up channel : Channel is A

 

Below is the port configuration for FlexRay Tx and Rx,

 

/* PC[5]: Pin functionality as FR_A_TX */
SIUL2.MSCR[37].B.SSS = 4; 
/* Output Buffer Enable on */
SIUL2.MSCR[37].B.OBE = 1;
/* Maximum slew rate */
SIUL2.MSCR[37].B.SRC = 3;
/* Input Buffer Enable off */
SIUL2.MSCR[37].B.IBE = 0;
/* Initialize low */
SIUL2.GPDO[37].B.PDO_4n = 0;
SIUL2.GPDO[37].R = 0; 

/* PE[2]: Pin functionality as FR_A_TX_EN */
SIUL2.MSCR[66].B.SSS = 2; 
/* Output Buffer Enable on */
SIUL2.MSCR[66].B.OBE = 1; 
/* Maximum slew rate */
SIUL2.MSCR[66].B.SRC = 3;
/* Input Buffer Enable off */
SIUL2.MSCR[66].B.IBE = 0;
/* Initialize low */
SIUL2.GPDO[66].B.PDO_4n = 0;
SIUL2.GPDO[66].R = 0;

/* PE[3]: Pin functionality as FR_A_RX */
SIUL2.MSCR[224].B.SSS = 1; 
/* Output Buffer Enable on */
SIUL2.MSCR[224].B.OBE = 0; 
/* Input Buffer Enable off */
SIUL2.MSCR[224].B.IBE = 1;
/* Maximum slew rate */
SIUL2.MSCR[224].B.SRC = 3;
/* Initialize low */
SIUL2.GPDO[224].B.PDO_4n = 0;
SIUL2.GPDO[224].R = 0;

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1 Solution
35 Views
NXP TechSupport
NXP TechSupport

Hi,

did you use

SIUL2.IMCR[224].B.SSS = 1;  // FR_A_RX connected to pad PE3 

in your code you have 

SIUL2.MSCR[224].B.SSS = 1;

for input, the SSS field is set in IMCR register not in MSCR, unless IMCRs are not defined then you will use MSCR[736]

BR, Petr

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4 Replies
35 Views
Contributor IV

Hi,

I corrected the pin configuration of FR_A_RX but still i have same problem. Here I have attached clock configuration file for your reference. FlexRay module requires 80MHz.


Below code is updated after suggested changes.

/* Output Buffer Enable on */
SIUL2.MSCR[37].B.OBE = 1;
/* Input Buffer Enable off */
SIUL2.MSCR[37].B.IBE = 0;
/* PC[5]: Pin functionality as FR_A_TX */
SIUL2.MSCR[37].B.SSS = 4;
/* Maximum slew rate */
SIUL2.MSCR[37].B.SRC = 3;

/* Output Buffer Enable on */
SIUL2.MSCR[66].B.OBE = 1;
/* Input Buffer Enable off */
SIUL2.MSCR[66].B.IBE = 0;
/* PE[2]: Pin functionality as FR_A_TX_EN */
SIUL2.MSCR[66].B.SSS = 2;
/* Maximum slew rate */
SIUL2.MSCR[66].B.SRC = 3;


/* Output Buffer Enable on */
SIUL2.MSCR[67].B.OBE = 0;
/* Input Buffer Enable off */
SIUL2.MSCR[67].B.IBE = 1;
/* PE[3]: Pin functionality as FR_A_RX */
SIUL2.MSCR[224].B.SSS = 1;
/* Maximum slew rate */
SIUL2.MSCR[67].B.SRC = 3;

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36 Views
NXP TechSupport
NXP TechSupport

Hi,

did you use

SIUL2.IMCR[224].B.SSS = 1;  // FR_A_RX connected to pad PE3 

in your code you have 

SIUL2.MSCR[224].B.SSS = 1;

for input, the SSS field is set in IMCR register not in MSCR, unless IMCRs are not defined then you will use MSCR[736]

BR, Petr

View solution in original post

35 Views
Contributor IV

its working now. it was my mistake. Thanks for support.

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35 Views
NXP TechSupport
NXP TechSupport

Hi,

seems you have wrong setting for FR_A_RX pin, it should be


SIUL2.MSCR[67].B.IBE = 1;  // Input Buffer Enable on

SIUL2.IMCR[224].B.SSS = 1;  // FR_A_RX connected to pad PE3 

Not sure why you write to GPDO, it has no meaning if peripheral function is selected for a pad.