FlexCAN auto enter freeze mode in mpc5746R

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FlexCAN auto enter freeze mode in mpc5746R

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大大许
Contributor III

Hi,

I meet an question about mpc5746R,I according an example to initial my flexcan0,when flexcan initial finish,the ERRS Rregister was setting .it incident my send frame is corrupt ,it make my send action to freeze mode .

But I find send frame stuff is right.how should to change.

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liushiquan
Contributor II

I solve this question after  see https://community.nxp.com/message/592277

The MPC5746R FlexCAN also supports detection and correction of errors in memory read accesses. 

 The ECC error may have occurred due to module not being initialized properly.

This feature that is enabled by default. 

Add  codes belows, or  set bit  ECCDIS in CAN_MECR  can solve this question.

void vfnCanUnrestrictedWrite(volatile struct CAN_tag *pcan)
{
#define CAN_BASE_ADDR    ((uint32_t)(pcan))
uint32_t i = 0;

pcan->CTRL2.B.WRMFRZ = 1; // Enable Unrestricted Write Access to FlexCAN Memory

(*(volatile long long int *) (CAN_BASE_ADDR + 0xAB0))=0x0000000000000000; //TX_SMB
(*(volatile long long int *) (CAN_BASE_ADDR + 0xAB8))=0x0000000000000000; //TX_SMB

(*(volatile long long int *) (CAN_BASE_ADDR + 0xAC0))=0x0000000000000000; //RX_SMB0
(*(volatile long long int *) (CAN_BASE_ADDR + 0xAC8))=0x0000000000000000; //RX_SMB0

(*(volatile long long int *) (CAN_BASE_ADDR + 0xAD0))=0x0000000000000000; //RX_SMB1
(*(volatile long long int *) (CAN_BASE_ADDR + 0xAD8))=0x0000000000000000; //RX_SMB1

(*(volatile long int *) (CAN_BASE_ADDR + 0xA80))=0x00000000; //RX_FIR0
(*(volatile long int *) (CAN_BASE_ADDR + 0xA84))=0x00000000; //RX_FIR1

(*(volatile long int *) (CAN_BASE_ADDR + 0xA88))=0x00000000; //RX_FIR2
(*(volatile long int *) (CAN_BASE_ADDR + 0xA8C))=0x00000000; //RX_FIR3

(*(volatile long int *) (CAN_BASE_ADDR + 0xA90))=0x00000000; //RX_FIR4
(*(volatile long int *) (CAN_BASE_ADDR + 0xA94))=0x00000000; //RX_FIR5

(*(volatile long int *) (CAN_BASE_ADDR + 0xA98))=0x00000000; //Reserved Location 0xA98 to 0xA9B
(*(volatile long int *) (CAN_BASE_ADDR + 0xA9C))=0x00000000; //Reserved Location 0xA9C to 0xA9F

for(i=0;i<128;i++)
(*(volatile long long int *) (CAN_BASE_ADDR + 0x480 + (i*8))) = 0x0000000000000000; //Reserved Location from 0x480 to 0x87F

for(i=0;i<32;i++)
(*(volatile long long int *) (CAN_BASE_ADDR + 0x980 + (i*8))) = 0x0000000000000000; //Reserved Location from 0x980 to 0xA7F


pcan->CTRL2.B.WRMFRZ = 0; // Disable Unrestricted Write Access to FlexCAN Memory
#undef CAN_BASE_ADDR
}

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alexandrunan
NXP Employee
NXP Employee

This Chip mpc5746r doesn't have ECC to cause freeze mode, but accordingly to documentation when the CPU is in Debug mode the Freeze of the can is automatically asserted !

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ceciliac
Contributor III

Hi,

I had a similar problem, after sending one message the ECC was triggered and the CAN module froze. The reason in my case was that the FlexCAN registers had not been initialized. It is also possible to configure the ECC behaviour in  CAN_MECR.

Thanks,

Cecilia

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大大许
Contributor III

Hi,

I don't remember how to solve this question,But I advise  to check GPIO configure.  

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martin_kovar
NXP Employee
NXP Employee

Hello,

could you please share your FlexCAN module settings and also GPIO settings?

Regards,

Martin