FLASH B erase error MPC5676

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FLASH B erase error MPC5676

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CCandido
Contributor V

hi,

I have problems with Erase block B flash MPC5676.

Block A erase ok, L0~L9, M1~M0 and L0/M0 <   update help

flash_b.png

//----------------code test FLASH_B

DCACHE_Disable();  withh/winout

FLASH_B.HLR.R = 0xB2B22222; //password
FLASH_B.HLR.B.HBLOCK = 0x00 ; //unlock all blocks in high address space
//Erase
FLASH_B.MCR.B.ERS = 1;
FLASH_B.HSR.B.HBSEL = 0x01;  //  blocks H0 
*(unsigned int *) 0x100000 = 0xFFFFFFFF;

FLASH_B.MCR.B.EHV = 1;
while ((FLASH_B.MCR.B.DONE == 0));
FLASH_B.MCR.B.EHV = 0;
FLASH_B.MCR.B.ERS = 0;
peg = FLASH_A.MCR.B.PEG;

//-------------------------updating it help

thanks,

Carlos.

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lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi Carlos,

the flash is interleaved in high address space:

pastedImage_1.png

This helps to improve the performance. In case of non-interleaved flash, two physical reads of flash arrays are needed to fill one cache line. If the flash is interleaved, the blocks are read in parallel, so it looks like only one physical read is necessary.

The interlock write to 0x10_0000 falls to flash block A. So, it does not work as you can see. You need to write to 0x10_0000+16.

Or you can use SSD flash drivers which handle everything on background and you use the flash as linear address space. You do not need to care about blocks A and B ever:

https://www.nxp.com/lgfiles/Qorivva/MPC5674F_C90FL_SSD_DRV.exe 

Regards,

Lukas

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lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi Carlos,

the flash is interleaved in high address space:

pastedImage_1.png

This helps to improve the performance. In case of non-interleaved flash, two physical reads of flash arrays are needed to fill one cache line. If the flash is interleaved, the blocks are read in parallel, so it looks like only one physical read is necessary.

The interlock write to 0x10_0000 falls to flash block A. So, it does not work as you can see. You need to write to 0x10_0000+16.

Or you can use SSD flash drivers which handle everything on background and you use the flash as linear address space. You do not need to care about blocks A and B ever:

https://www.nxp.com/lgfiles/Qorivva/MPC5674F_C90FL_SSD_DRV.exe 

Regards,

Lukas

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CCandido
Contributor V

hi Lukas,

my code in RAM without ISR and exceptions_table,

so I chose the way to work with interlock.

write flash control address no problem, no near code have,

 Erase high-address all space.

have solution do withot SSD driver ?

my test SSD   : VLE_ON, COPYRAM_FALSE

ret = pFlashInit( &ssdConfig );  call not  return

thanks,

Carlos

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lukaszadrapa
NXP TechSupport
NXP TechSupport

As I mentioned, there's no problem with your code. The interlock write just must fall within block B, that means you need to write to 0x10_0010, not to 0x10_0000.

Regarding SSD driver - I would need to see your code.

Regards,

Lukas

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CCandido
Contributor V

hi Lukas,

SSD solved problems,

thanks,

Carlos.

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