I'm trying to transmit packets using MPC5777c the following is the configuration set
My clock XTAL is 25MHZ
per clock - 100MHZ
void setMacfortheDevice()
{
mac[0] = 0x11;
mac[1] = 0x22;
mac[2] = 0x33;
mac[3] = 0x44;
mac[4] = 0x55;
mac[5] = 0x66;
}
Need to know whether settings are right I'm trying to use mpc5777M ethernet example as ref.
void FEC_Init(void)
{
setMacfortheDevice();
SIU.PCR[99].R = ALTERNATE_2_FUNC|OBE|IBE|SRC|WPE; /* Set to FEC_MDIO */
SIU.PCR[109].R = ALTERNATE_3_FUNC|OBE|WPE; /* Set to FEC_MDC must be strong drive for MDIO & MDC */
SIU.PCR[474].R = PRIMARY_FUNC|OBE|IBE; /* Set to FEC_REF_CLK */
SIU.PCR[252].R = PRIMARY_FUNC|OBE|SRC; /* Set to FEC_TX_EN */
SIU.PCR[248].R = PRIMARY_FUNC|OBE|SRC; /* Set to FEC_TXD[0] */
SIU.PCR[251].R = PRIMARY_FUNC|OBE|SRC; /* Set to FEC_TXD[1] */
SIU.PCR[250].R = PRIMARY_FUNC|IBE|WPE; /* Set to FEC_RXD[0] */
SIU.PCR[253].R = PRIMARY_FUNC|IBE|WPE; /* Set to FEC_RXD[1] */
SIU.PCR[249].R = PRIMARY_FUNC|IBE|WPE; /* Set to FEC_RX_DV */
SIU.FECCR.B.FM = 0; /*Enable RMII Mode*/
FEC.ECR.R = 0x1; // Start reset
while (FEC.ECR.B.RESET) { } ; // Wait for reset to complete
FEC.EIMR.R = 0; // Disable interrupts
FEC.EIR.R = 0xFFFFFFFF; // Clear any interrupts
int i = 0;
for (i = 0; i < 2; i++)
{
// Init tx and rx descriptors
txDesc[i].status = 0x2C00; // Last and transmit CRC
txDesc[i].length = 0;
txDesc[i].bufferPointer = txBuf;
markRxDescEmpty(&rxDesc[i]);
rxDesc[i].bufferPointer = rxBuf[i];
}
// Reset multicast fields
FEC.GAUR.R = 0;
FEC.GALR.R = 0;
FEC.IAUR.R = 0;
FEC.IALR.R = 0;
// Set rx buf size
//FEC.EMRBR.R = sizeof(txBuf);
FEC.EMRBR.R = 1536;
// Set in RMII mode with full frame size 10Mbps
FEC.RCR.R = 0x05EE030C;
// Set RMII speed - operation at 50Mhz /5*2
FEC.MSCR.B.MII_SPEED = 0x5;
// Enable module
FEC.ECR.R = 0x2;
// Enable full duplex
FEC.TCR.R = 0x00000004;
// Enable interrupt
FEC.EIMR.R = 0x02000000;
// Configure a MAC address
FEC.PALR.R = (unsigned long)((mac[0] <<24)|(mac[1] <<16)|(mac[2] <<8)|(mac[3] <<0));
FEC.PAUR.R = (unsigned long)(mac[4] <<24)|(mac[5] <<16);
// Flag descriptors available to allow reception
FEC.RDAR.R = 0x0100000;
}
Mainly need to know whether my FEC.RCR and MII speed are right?
Thanks & Regards,
Vignesh
Hi,
Ok thanks but I'm unable to view the attachment.
Regards,
Vignesh
Hi Petr,
I got the attachment . Thanks.
Regs,
Vignesh
Hi,
The receive Interrupt and transmit interrupt is not hit at any cost also.
Regards,
Vignesh
ok. One more clarification. I have developed based on ref of ethernet demo .. in my target board.
I have configured an interrupt on vector 196 on EIR RXF - for receive interrupt and 195 for TX to indicate tx complete interrupt
. I try to read the status or print the count of tx packets . It either shows large values or zero when I see those in watch buffer kept at a breakpoint. what could be possible cause for the error . IF RCR settings and pin settings are correct is it into some other configuration issue?
I'm using Broard R-Reach cable for transmission where Broadcom chip is used as switch. the link status is established and it shows correct link
but no packets are able to be transmitted which I'm checking basically through wireshark
Regards,
Vignesh
Hi,
SIU.PCR[99].R = ALTERNATE_2_FUNC|OBE|IBE|SRC|WPE; /* Set to FEC_MDIO */
SIU.PCR[109].R = ALTERNATE_3_FUNC|OBE|WPE; /* Set to FEC_MDC must be strong drive for MDIO & MDC */
SIU.PCR[474].R = PRIMARY_FUNC|OBE|IBE; /* Set to FEC_REF_CLK */
SIU.PCR[252].R = PRIMARY_FUNC|OBE|SRC; /* Set to FEC_TX_EN */
SIU.PCR[248].R = PRIMARY_FUNC|OBE|SRC; /* Set to FEC_TXD[0] */
SIU.PCR[251].R = PRIMARY_FUNC|OBE|SRC; /* Set to FEC_TXD[1] */
SIU.PCR[250].R = PRIMARY_FUNC|IBE|WPE; /* Set to FEC_RXD[0] */
SIU.PCR[253].R = PRIMARY_FUNC|IBE|WPE; /* Set to FEC_RXD[1] */
SIU.PCR[249].R = PRIMARY_FUNC|IBE|WPE; /* Set to FEC_RX_DV */
SIU.IMUX0.B.MUXSEL6 = 0x01;
SIU.IMUX0.B.MUXSEL5 = 0x01;
SIU.IMUX0.B.MUXSEL4 = 0x01;
SIU.IMUX0.B.MUXSEL3 = 0x01;
SIU.IMUX0.B.MUXSEL2 = 0x01;
SIU.IMUX0.B.MUXSEL1 = 0x01;
SIU.IMUX0.B.MUXSEL0 = 0x01;
SIU.IMUX0.R = SIU.IMUX0.B.MUXSEL6|SIU.IMUX0.B.MUXSEL5|SIU.IMUX0.B.MUXSEL4|SIU.IMUX0.B.MUXSEL3| \
SIU.IMUX0.B.MUXSEL2|SIU.IMUX0.B.MUXSEL1|SIU.IMUX0.B.MUXSEL0;
I tried this for setting up FEC pins is this right . Should there be a high In scope when I probe TX _EN pin.
Can u guide me and correct me if wrong.
Regards,
Vignesh
Hi,
there is no need to set IMUX0 for FEC functionality. Rest of setting looks correct, the FEC_REF_CLK is input only.
The TX_EN is driven high when valid nibbles are present on the MII, so during transmission only.
BR, Petr
Hi,
FEC.RCR setting looks correct. The MII_SPEED value should be calculated based on FM_PER_CLK.
BR, Petr