FCCU fake fault creation

[ravindrapetanka]

Hello sir,

I have following clarification regards to FCCU in MPC5777C controller.

 In our software :

1 Fault is programmed as hardware recoverable in  FCCU_NCF_CFGn)

2 The reaction programmed for the fault is FCCU Error Output signaling (FCCU_EOUT_SIG_ENn) and NMI is enabled in the FCCU_NMI_ENn register.

 We simulated the error by writing in to the NCFF register.

1 Does writing in to the NCFF register creates permanent fault or temporary fault.?

2 Do I need to write 0 to the NCFF register to clear the fault, since we have configured as hardware recoverable fault..?

Best Regards

Ravindra

[davidtosenovjan]

A fault injected by write to FCCU_NCFF needs to be cleared by particular bit FCCU_NCF_S register (what’s move FCCU from ALARM to NORMAL or from FAULT to NORMAL state) thus from this point of view it acts as SW recoverable fault. FCCU_NCFF is not supposed to be cleared software way.

[ravindrapetanka]

Hi David,

In case of hardware recoverable fault,is the FCCU_NCF_S required to be cleared.?

Since its a hardware recoverable fault,one there is no error the status will be cleared automatically.?

Regards

Ravindra

[davidtosenovjan]

In case it is real HW recoverable fault (it is not injected) then it is not needed.

[ravindrapetanka]

the FCCU faults RCCU_0 and RCCU_1 is mentioned as "Safety cores out of sync during lockstep" in reference manual.
So the RCCU_0 refers to Core1 and RCCU_1 refers to checker core faults.?

[davidtosenovjan]

No, MPC57xxx devices have only RCCU fault source for one kind of error. It is clear both RCCUs detects a mismatch between an output of the safety lake and the equivalent output of the original lake. However currently clearly described which signals RCCU_0 and RCCU_1 compares. Probably one of it will be related to cache controller signals and one for the rest. But I don’t know it for sure. I will ask letting you know.